EP0135931A3 - - Google Patents

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Publication number
EP0135931A3
EP0135931A3 EP84111433A EP84111433A EP0135931A3 EP 0135931 A3 EP0135931 A3 EP 0135931A3 EP 84111433 A EP84111433 A EP 84111433A EP 84111433 A EP84111433 A EP 84111433A EP 0135931 A3 EP0135931 A3 EP 0135931A3
Authority
EP
European Patent Office
Prior art keywords
processors
orientated
functions
switching
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP84111433A
Other versions
EP0135931A2 (en
EP0135931B1 (en
Inventor
Rudolf Dipl.-Ing. Bitzinger
Walter Dipl.-Ing. Engl
Siegfried Humml
Klaus Dipl.-Ing. Schreier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to AT84111433T priority Critical patent/ATE36628T1/en
Publication of EP0135931A2 publication Critical patent/EP0135931A2/en
Publication of EP0135931A3 publication Critical patent/EP0135931A3/xx
Application granted granted Critical
Publication of EP0135931B1 publication Critical patent/EP0135931B1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54516—Initialization, software or data downloading
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/5455—Multi-processor, parallelism, distributed systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/1305—Software aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13109—Initializing, personal profile
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13376—Information service, downloading of information, 0800/0900 services

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Hardware Redundancy (AREA)
  • Manufacture Of Tobacco Products (AREA)
  • Motorcycle And Bicycle Frame (AREA)
  • Tires In General (AREA)
  • Selective Calling Equipment (AREA)
  • Sub-Exchange Stations And Push- Button Telephones (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Monitoring And Testing Of Exchanges (AREA)

Abstract

1. A central control unit of a switching system, in particular a telephone switching system with a plurality of processors (BP, CP) which are of fundamentally-identical construction and which can be provided with individually-assigned stores (LMY) which carry out distributed switching-orientated functions and which, in the event of a funtional failure, are represented by another of the processors and a central bus system (B : CMY) to which the processors (BP, ZP) are connected, characterised in that only two processors (BP), serving as so-called base processors (BP), additionally carry out operational and/or security-orientated functions in such manner that the first base processor (BPO), namely the controlling processor of the two processors, thus in the controlling state, is capable of carrying out alone these instantaneous operational and/or security-orientated functions but for this purpose is only partially loaded, namely up to x % of its computing capacity, so that up to (100-x)% of its computing capacity can additionally assume switching-orientated functions, the second base processor (BP1) which is in the non-controlling state, is equipped in such manner that it always keeps available at least x % of its capacity in order to possibly later take over the control of the operational and/or security-orientated functions from the first, previously-controlling base processors (BPO), the second base processor (BP1) is thus suitable, prior to assuming control, to itself undertake switching-orientated functions in respect of a maximum of up to (100-x)% of its capacity.
EP84111433A 1983-09-26 1984-09-25 Central control unit of a switching system, in particular a telephone switching system Expired EP0135931B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT84111433T ATE36628T1 (en) 1983-09-26 1984-09-25 CENTRAL CONTROL UNIT OF A SWITCHING SYSTEM, ESPECIALLY TELEPHONE SWITCHING SYSTEM.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3334792 1983-09-26
DE19833334792 DE3334792A1 (en) 1983-09-26 1983-09-26 CENTRAL CONTROL UNIT OF A SWITCHING SYSTEM, IN PARTICULAR TELEPHONE SWITCHING SYSTEM

Publications (3)

Publication Number Publication Date
EP0135931A2 EP0135931A2 (en) 1985-04-03
EP0135931A3 true EP0135931A3 (en) 1985-05-15
EP0135931B1 EP0135931B1 (en) 1988-08-17

Family

ID=6210094

Family Applications (1)

Application Number Title Priority Date Filing Date
EP84111433A Expired EP0135931B1 (en) 1983-09-26 1984-09-25 Central control unit of a switching system, in particular a telephone switching system

Country Status (7)

Country Link
EP (1) EP0135931B1 (en)
JP (1) JPH0666986B2 (en)
AT (1) ATE36628T1 (en)
BR (1) BR8404818A (en)
DE (2) DE3334792A1 (en)
FI (1) FI78591C (en)
ZA (1) ZA847563B (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE71788T1 (en) * 1986-03-12 1992-02-15 Siemens Ag METHOD FOR OPERATION OF A FAILURE-PROTECTED HIGH AVAILABILITY MULTIPROCESSOR CENTRAL CONTROL UNIT OF A SWITCHING SYSTEM.
DE3629399A1 (en) * 1986-08-29 1988-03-03 Siemens Ag Method for operating the central memory of a multiprocessor-type common control unit of a switching system
DE3629406A1 (en) * 1986-08-29 1988-03-03 Siemens Ag Method for load distribution among the central processors of a multiprocessor-type common control unit of a switching system
DE3629466A1 (en) * 1986-08-29 1988-03-10 Siemens Ag Method for load distribution among the processors of a high-availability multiprocessor-type common control unit of a switching system
DE3688139T2 (en) * 1986-12-30 1993-10-07 Ibm Double circuit arrangement for fast transmission and repairability.
EP0371169B1 (en) * 1988-12-01 1994-02-16 Siemens Aktiengesellschaft Method for controlling the taking over of, on the one hand, switching-related tasks and, on the other hand, operational and/or protection-related tasks by a processor in the central control unit of a telecommunications switching system
DE10131920A1 (en) * 2001-07-02 2003-01-23 Tenovis Gmbh & Co Kg Communication installation with distributed control, has each equipment module provided with emergency operation-control unit for switching to emergency operation mode

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2001832A1 (en) * 1969-01-17 1970-07-30 Plessey Btr Ltd Memory program-controlled data processing arrangement

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2001832A1 (en) * 1969-01-17 1970-07-30 Plessey Btr Ltd Memory program-controlled data processing arrangement

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
ELECTRICAL COMMUNICATION, Band 55, Nr. 1, 1980, Seiten 37-45, New York, US; P. SOMOZA et al.: "Dynamic processor overload control for SPC switching systems" *
INTERNATIONAL CONFERENCE ON COMMUNICATIONS, Seattle, 8.-12. Juni 1980, Band 1, Seiten 18.2.1 - 18.2.8, IEEE, New York, US; S.E. PUCCINI et al.: "Architecture of GTD-5 EAX digital family" *
INTERNATIONAL SWITCHING SYMPOSIUM, Montreal, 21.-25. September 1981, Session 21A, Paper 2, Seiten 1-7; M. WARD: "An enhanced processor for system X" *
NATIONAL TELECOMMUNICATIONS CONFERENCE, New Orleans, 29. November - 3. Dezember 1981, Band 1, Seiten A6.1.1 - A6.1.5, IEEE, New York; Y. HORI et al.: "Fault detection and recovery for a multi-processor controlled digital switching system" *
REVIEW OF THE ELECTRICAL COMMUNICATION LABORATORIES, Band 30, Nr. 5, September 1982, Seiten 792-801, Tokyo, JP; A. NIWA u.a.: "Multiprocessor control hardware design for DTS-11 digital toll switching system" *

Also Published As

Publication number Publication date
FI78591C (en) 1989-08-10
EP0135931A2 (en) 1985-04-03
JPS6091795A (en) 1985-05-23
BR8404818A (en) 1985-08-13
ATE36628T1 (en) 1988-09-15
FI843758L (en) 1985-03-27
JPH0666986B2 (en) 1994-08-24
FI78591B (en) 1989-04-28
ZA847563B (en) 1985-05-29
DE3473553D1 (en) 1988-09-22
DE3334792A1 (en) 1984-11-08
EP0135931B1 (en) 1988-08-17
FI843758A0 (en) 1984-09-25

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