EP0085868B1 - Vorrichtung zur automatischen optischen Beschaffenheitsprüfung - Google Patents

Vorrichtung zur automatischen optischen Beschaffenheitsprüfung Download PDF

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Publication number
EP0085868B1
EP0085868B1 EP83100524A EP83100524A EP0085868B1 EP 0085868 B1 EP0085868 B1 EP 0085868B1 EP 83100524 A EP83100524 A EP 83100524A EP 83100524 A EP83100524 A EP 83100524A EP 0085868 B1 EP0085868 B1 EP 0085868B1
Authority
EP
European Patent Office
Prior art keywords
light
linear
diode array
light band
scanning head
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
EP83100524A
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German (de)
English (en)
French (fr)
Other versions
EP0085868A1 (de
Inventor
Michael Ing. Grad. Grammerstorff
Hans Pietruschka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IBM Deutschland GmbH
International Business Machines Corp
Original Assignee
IBM Deutschland GmbH
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IBM Deutschland GmbH, International Business Machines Corp filed Critical IBM Deutschland GmbH
Publication of EP0085868A1 publication Critical patent/EP0085868A1/de
Application granted granted Critical
Publication of EP0085868B1 publication Critical patent/EP0085868B1/de
Expired legal-status Critical Current

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302—Contactless testing
    • G01R31/308—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
    • G01R31/309—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation of printed or hybrid circuits or circuit substrates

Definitions

  • the invention relates to a device for automatic optical quality inspection according to the preamble of the main claim.
  • the optical quality check is particularly important for printed circuit boards that are composed of several individual layers with individual cable patterns (so-called multi-layer cards);
  • the electrical continuity test for the individual conductor runs which is widely used there, indicates a fault-free component even if individual dimensions, for example the minimum distance between two conductor tracks, are not adhered to everywhere. In many cases, such errors only become noticeable after the plate has been in use for a long time, e.g. a short circuit due to electrical material transport or e.g. an interruption occurs due to mechanical stress.
  • the first consists in comparing a manufactured component with a defective pattern point-by-point in order to determine all deviations.
  • a system is described, for example, in the article by E. Krochmann and P. Wirz “Automatic Vector Distance Comparator VDK Projectina” in Feintechnik & Messtechnik 84 (1976), No. 7, pages 330-334.
  • this method has the disadvantage that the sample and sample have to be aligned very precisely with one another, and that even then many deviations are displayed as errors that do not impair the functionality of the component being tested (e.g. per se small, harmless relative displacements of individual sub-areas within the Pattern).
  • this test requires a relatively large amount of time.
  • the test object can also be scanned with an image converter and the resulting digitized image can be compared with a stored digital representation of the pattern.
  • Another test method consists in examining only relatively small sections of the surface to be examined to determine whether the design regulations for the sample in question have been observed there. Such a test extends, for example, to the minimum and maximum conductor cross sections, the mutual conductor spacing and the occurrence of permitted larger conductor areas, for example soldering eyes.
  • This test method is particularly suitable for the regularly structured patterns in printed circuit boards, etc., since this results in relatively simple delimitation criteria and the circuitry required to carry out the method remains low. With digital image processing, the memory of high capacity for storing the pattern data is eliminated.
  • An example of such an optoelectronic test system for automatically checking the quality of printed circuit boards can be found in European patent application 23 574.
  • the methods and devices for optical quality inspection described in the prior art are limited to the two-dimensional image of the object to be examined, for example a printed circuit board, which arises when the original is scanned, for example with a television camera.
  • the conductor tracks on a printed circuit board are actually three-dimensional structures, the thickness of which also represents an essential construction parameter that must be within certain limits; If the nominal thickness is undershot, an interruption of the conductor track can occur after a while due to material transport when a current passes; if the thickness is exceeded, problems can arise when laminating intermediate layers into the final printed circuit board.
  • So-called light section methods are known in the prior art for monitoring the height or the thickness of products.
  • An example of this is provided by US-A-4 053 234, in which the product to be monitored, namely baked goods, is illuminated obliquely with a light spot; this light spot is imaged on a photodiode arrangement, which is perpendicular to the biscuit in the optical plane of incidence. The position of this image is determined electronically from the output signal of the photodiode line and provides a measure of the thickness of the pastry. With this arrangement and the lighting used, the other dimensions of the biscuit can. ke can not be determined. The exact halft. direction of the distance between the photodiode line and the surface on which the biscuits lie is not checked, so that the accuracy of this arrangement is limited.
  • test Since many image points have to be saved, read out, processed and saved again when processing digitized images, the test is the current system for visual inspection. speed too low for production purposes.
  • the present invention therefore has as its object an automatic procurement device.
  • Fitness test of the type mentioned at the beginning. with which, in addition to the two-dimensional dimensions, the third dimension (height) in egg.
  • the sample to be checked can be monitored and which allows a quick check with a relatively simple structure.
  • the proposed testing device uses an optical scanning head with a light-cutting device for scanning the test specimen line by line, for example a printed circuit board.
  • a scanning head two arrays of diode lines are arranged at a short distance from one another, the first of which receives the light which is reflected by the surface of the insulating base plate in the case of strip-shaped, incident lighting and the second the light which is reflected on the surface of a conductor track is reflected if it is at the desired nominal height.
  • the output signals of the diode rows are converted into binary values in accordance with an adaptively changing threshold value and evaluation circuits are supplied which check whether the nominal dimensions in the two-dimensional image have been met.
  • the check for permitted image features is carried out in parallel by a plurality of evaluation circuits each associated with an image feature. Detected errors are marked and can be displayed on a television screen, for example.
  • the proposed test device enables all relevant construction parameters of an essentially two-dimensional image with a relief-like height structure to be determined; Since only the diode row that has just been scanned is to be processed, the processing speed of the entire system becomes so high that the evaluation takes place at the same time as the scanning.
  • the circuitry is low, since no complex reference data (template) has to be saved and compared with the current data.
  • the optical resolution that can be achieved with the diodes available today is in the range of a few ⁇ .
  • Fig. 1 shows a perspective view of a section of a printed circuit board, which consists of an insulating base plate 10 and a plurality of conductor tracks 11 and 11b arranged thereon, for example made of copper.
  • the width w, the height h and the mutual distance d of these conductor tracks 11 a, 11 b are now to be examined over the entire printed circuit board to determine whether they lie within the permitted value ranges.
  • the plate is illuminated with a light band which is generated by a lamp 12 and a slit diaphragm 13 arranged in front of it and forms an angle of incidence a with respect to the printed circuit board.
  • the angle of incidence a is preferably in the vicinity of a - 45 °, the light band is oriented perpendicular to the longitudinal axis of the conductor tracks 11.
  • the entire surface of the circuit board is scanned in a meandering manner, for example by continuously or step-wise shifting the entire circuit board in a direction perpendicular to the light band (arrow 14).
  • the length of the light band generated is in the range of a few cm, its width is several ⁇ m and above.
  • An optical imaging system between the light gap 13 and the test specimen 10 produces a sharply delimited image of the gap.
  • an arrangement of optical waveguides optical fibers
  • Adjustment means can be provided to adjust the components of the scanning head against the specimen to be examined.
  • the geometric configuration of the light source and diode rows is selected such that an image 18a is generated on the diode row 17a when the light band is reflected on a conductor track 11 with a nominal height h. If the light band strikes a conductor strip, for example in part 16b, the height of which does not correspond to the nominal height h, as is shown, for example, in the depression 100 of the conductor strip 11b, the reflected light strip 18b does not reach the diode row 17a, but becomes dependent on it Direction of the height deviation to the left or right of it distracted. The amount ⁇ x of this deflection depends on how far the actual height of the conductor track deviates from the nominal height.
  • the shift .DELTA.x need not be exactly determined if the test of the conductor line height is limited to the monitoring of the nominal height range.
  • the tolerance range within which the nominal height must lie can be set by appropriately selecting the light-sensitive area of the diodes and / or the width of the light band. Typical values for the checked height range are around 10 ⁇ m with a tolerance range of a few ⁇ .
  • the circuit board When the circuit board is scanned step by step, the charge image of the diode row 17a caused by the exposure is evaluated; For this purpose, the diode rows are read out sequentially (in the direction of arrow 19), the output signals are converted into a binary position and sent to evaluation circuits which determine whether the width of the light-dark pattern received by the diode row 17a corresponds to the nominal width of the conductor tracks and the nominal distances.
  • FIG. 2 shows the individual components of a complete system for the automatic quality inspection of printed circuit boards as a block diagram.
  • the circuit board 200 to be tested lies on a cross support (X-Y table) 201 and is illuminated by two projectors 202a, 202b, which are mounted symmetrically to its normal, each with a light band which strikes the circuit board at an angle a.
  • the doubling of the light band projectors prevents the creation of undesirable shadow areas, for example on rough surfaces.
  • the light reflected on the circuit board 200 is registered by a scanning head 203 mounted vertically above the circuit board, in which the diode rows 17a and 17b explained with reference to FIG. 1 are contained.
  • the output signals of the diode double row 17b are fed as a control signal to a motor 204 which keeps the working distance between the scanning head 203 and the circuit board 200 constant.
  • the cross support 201 is preferably moved continuously by a table controller 206; after each shift by 12 li, the diode row controller 205 connected to the table controller outputs a read signal to the diode rows 17a, 17b.
  • the entire printed circuit board 200 is preferably led away in a meandering shape under the light strips of the projectors 202a, 202b.
  • the charge distribution in the diode row 17a represents the local brightness distribution of the light band reflected on the printed circuit board 200, and is serially fed to an edge detector 207 which converts the analog values of the diode signals into a binary representation in accordance with a continuously updated threshold value.
  • the respective black-and-white threshold value is set in circuit 208 in such a way that when an edge occurs, the signals of a defined number of diodes to the left and right of the edge are summed and an average value is formed therefrom.
  • This mean value is selected as the current threshold value for the binary conversion of the following diode signals, so that changes in the lighting or the local reflection properties of the printed circuit board 200 do not give rise to any shift in the edge position in the diode image.
  • the binary output signal of the edge detector 207 is fed to two counters 209, 210 with which the successive light / dark (white / black) elements are counted in the binary image which was generated from the output signals of the scanned diode row 17a.
  • the output signals of the counters 209, 210 are supplied on the one hand to the circuit 208 for setting the black / white threshold, in order to be able to determine the specified number of picture elements on the left and right of an edge;
  • the counters 209, 210 are connected to a circuit 211, which determines whether the nominal values for the conductor line width and for the mutual spacing of the conductor lines have been observed.
  • the test is carried out in a simple manner by comparing the length of the connected light or dark areas of the binary signal with predetermined values.
  • the default values for the various types of printed circuit boards to be examined can be stored in a floppy disk station 214 and transferred to the circuit 211 at the start of the test.
  • the output circuit of an edge position monitor 215 is also fed to the test circuit 211, with the aid of which the different conductor tracks which are simultaneously acted upon by a light strip can be distinguished.
  • the conductor tracks 303-307 are examined simultaneously in a scanning position (the line 300 corresponds to the image of the reflected light band); the edge position monitor accordingly contains information about the edge position of each conductor track in order to be able to correctly assign the edges then determined to the respective conductor tracks in the subsequent scanning step.
  • the monitor 215 receives as input signals the output signals of the edge detector 207 and the test circuit 211 as well as the status of a diode counter 216, which in turn is acted upon by the edge detector 207.
  • the diode counter supplies the address of the respective edge, which is stored in the monitor 215 until the next scan.
  • test circuit 211 determines values for the conductor width and the conductor spacing that are outside the allowed range, this need not necessarily indicate an error in the conductor pattern.
  • the printed circuit board has a number of further permitted geometrical figures of conductor parts, for example soldering eyes (labeled 308 in FIG. 3) or conductor runs 309, 310 which bend at right angles or at an angle.
  • soldering eyes labeled 308 in FIG. 3
  • conductor runs 309, 310 which bend at right angles or at an angle.
  • each profile detection circuit 212a-212n is provided for upcoming profiles.
  • a set of these profile detection circuits is also provided for each trace (eg 303-307 in Fig. 3) traced during a scan.
  • the test circuit 211 detects a value that is outside the permitted range, it activates the group of profile detection circuits responsible for the conductor track in question, for example 212a-212n, which then determine with each further scanning step whether the values objected by the test circuit 211 correspond to one of the approved profiles. If, for example, a pad 308 is scanned, the profile detection circuit responsible for this will emit a “found” signal when the light band has run over the entire pad. If profiles are not permitted, none of the profile detection circuits 212 emits a “found” signal, so that the error detection circuit 219, which is connected to the outputs of the profile detection circuit 212, 213 ..., detects an error.
  • the profile detection circuits 212, 213 can be set with the aid of default data from the diskette station 214 to the respective profiles that are permitted on a printed circuit board.
  • a line break, e.g. 3 is detected in an area 311 of the conductor track 307 of FIG. 3 in an interrupt detection circuit 218, which receives input signals from the test circuit 211 and the edge position monitor 215.
  • the test circuit 211 cannot detect such errors on its own, since the diode row 17a at this point only indicates a (per se permitted) larger distance between a plurality of conductor tracks.
  • the error detection circuit 219 is supplied with all signals which indicate irregularities (impermissible profile, incorrect edge position, interrupted conductor path).
  • the location of each error that has occurred is determined on the basis of the table coordinates provided by the table controller 206 and is used to create an error log and / or to set an analysis and repair table on which the faulty circuit board 200 is placed, so that the faulty location is started automatically.
  • a correspondingly set scanning diode row 17a is provided for each height.
  • FIG. 4A which is designed as a side view
  • a conductor track 11 lying on the base plate 10 is accordingly illuminated with a light band 43 of width B, which is generated by the light source 12 via corresponding optical imaging means and diaphragms.
  • this strip of light strikes the conductor at an angle a.
  • the nominal height h of the conductor 11 can fluctuate in a range T.
  • the diode row 17a is then arranged vertically above the intersection points of the light band limitation with the limits of the permitted value range T. If the diode row 17a does not receive any light, the conductor height h is outside the permitted value range.
  • an optical bridge arrangement is used in which a photodetector 42 arranged in the scanning head 40 has two adjacent and coordinated photosensitive surfaces F1 and F2.
  • This photodetector receives light from an elliptical area 44, which is illuminated by a round laser beam 45 which strikes the base plate 10 at an angle. If the base plate 10 maintains its nominal distance 1 from the scanning head of the present invention, both photosensitive surfaces F1 and F2 see the same proportion of the elliptical impact area, so that a connected electrical bridge circuit does not provide an output signal.
  • the position of the elliptically illuminated area also shifts, so that the photo areas F1 and F2 are illuminated unevenly and emit an output signal that can be used for height control.
  • This output signal is a continuously changing analog value and enables very fast height control even with the smallest unevenness ( «10 11m) of the base plate.
  • Another advantage of this arrangement is that it is insensitive to changes in the local reflective properties of the circuit board. If the height of the base plate is correct, both output signals of the photosensitive surfaces F1, F2 change, in opposite directions. If, on the other hand, a strongly reflecting conductor surface is covered during the scanning process, the one and then the other output signal changes first, the other signal remaining constant. This property of the height control device can be evaluated in a downstream logic circuit.
  • a further diode row 41 is also provided, which is at a distance A parallel to the diode row 17a.
  • the task of this row of diodes is to determine whether there are further metallized areas on the base plate 10 in addition to the permitted conductor runs, which are outside the permitted height range of conductor runs and thus cannot be “seen” by the diode row 17a.
  • Such metallic surfaces can be, for example, thin copper residues between the actual conductor tracks, which have not been completely etched away and can lead to short circuits.
  • the field of view of the diode row 41 extends from the base plate (ie height 0) to a value above the conductor height h shown there.
  • Other fields of view of this diode row can be set by appropriate selection of the distance A and / or the width B of the light band.
  • FIG. 4B shows in a highly schematic manner a perspective view of the light section method just discussed with wide light bands, which are shown hatched in FIG. 4B.
  • the reference numerals in Fig. 4B correspond to those of Fig. 4A.
  • FIG. 5 shows a schematic front view of an optical inspection system of the type described with reference to FIG. 4A, in which the scanning head 40 moves perpendicular to the plane of the drawing.
  • the head 40 is suspended via piezoelectric elements 50a, 50b, which are actuated by actuating signals from the photodiodes 42a, 42b and thus allow rapid height adjustment when the height of the base plate 10 changes. With this arrangement, corrections are also possible when the base plate 10 is skewed. Larger height differences, which are determined when the base plate 10 is passed over, can be compensated for by the motor M, which raises or lowers the entire arrangement with the head 40, piezoelectric elements 50 and photodetectors 42.
  • the sensors 42a, 42b are arranged in such a way that, seen in the direction of movement, they are somewhat in front of the area of incidence of the light band, so that with curved base plates there is sufficient time to correct the nominal height until the scanning head arrives above the illuminated point on the base plate.
  • the output signals of the optical sensors are processed in a logic circuit (not shown) before they are used as control signals for the piezoelectric elements 50.
  • FIG. 6 shows an overall schematic representation of a device for optical quality inspection, in which an additional diode row 41 is provided, with which metallizations present between the conductor tracks are determined.
  • This additional diode row explained with reference to FIG. 4A can also be used in a scanning head which processes narrow light strips, as were explained with reference to FIG. 1.
  • an additional projector 220 is used (in its place, some of the light from the projectors 202a or 202b could also be coupled out), which, viewed in the direction of movement, generates a further narrow light band behind the actual measuring diode line 17a, which strikes the circuit board perpendicularly .
  • the mirror 221 is displaceably arranged in order to set the two possibilities of beam guidance discussed above.
  • the output signal of the additional diode row 41 is evaluated in an edge detector 222, the function of which corresponds to the edge detector 207 explained earlier.
  • the test for metallized areas between the actual conductor tracks takes place in a logic circuit 223, to which the metallized areas recognized in circuit 222 are fed, which have been delayed in a memory 224, in order to compensate for the time lag of the output signals of diode row 41, which in FIG Direction of movement is arranged behind the diode row 17a.
  • the logic circuit 223 then subtracts the metallized areas identified as a conductor path from the metallized areas determined by the diode row 41. If the difference is not equal to 0 (or above a predetermined threshold value), there is an undesired metallization between the conductor tracks, and circuit 223 outputs an error signal to the error detection circuit 219.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
EP83100524A 1982-02-06 1983-01-21 Vorrichtung zur automatischen optischen Beschaffenheitsprüfung Expired EP0085868B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19823204086 DE3204086A1 (de) 1982-02-06 1982-02-06 Vorrichtung zur automatischen optischen beschaffenheitspruefung
DE3204086 1982-02-06

Publications (2)

Publication Number Publication Date
EP0085868A1 EP0085868A1 (de) 1983-08-17
EP0085868B1 true EP0085868B1 (de) 1986-01-08

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EP83100524A Expired EP0085868B1 (de) 1982-02-06 1983-01-21 Vorrichtung zur automatischen optischen Beschaffenheitsprüfung

Country Status (4)

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US (1) US4583857A (enrdf_load_stackoverflow)
EP (1) EP0085868B1 (enrdf_load_stackoverflow)
JP (1) JPS58146844A (enrdf_load_stackoverflow)
DE (2) DE3204086A1 (enrdf_load_stackoverflow)

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DE10328537B4 (de) * 2003-06-24 2015-03-26 Pixargus Gmbh Vorrichtung und Verfahren zum Vermessen der Dimension eines Körpers
KR101474859B1 (ko) * 2013-09-12 2014-12-30 주식회사 고영테크놀러지 기판 검사를 위한 기준 데이터 생성방법
CN108792563B (zh) * 2017-04-28 2024-04-05 深圳米飞泰克科技股份有限公司 一种集成电路板自动测试设备及其测试方法
CN111463230A (zh) * 2020-04-13 2020-07-28 深圳市华星光电半导体显示技术有限公司 Micro LED阵列基板的修补装置以及micro LED阵列基板的修补方法
CN114397091A (zh) * 2021-12-07 2022-04-26 伟创力电子技术(苏州)有限公司 一种光波导模组的自动测试方法
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Also Published As

Publication number Publication date
DE3204086A1 (de) 1983-08-11
JPH0236894B2 (enrdf_load_stackoverflow) 1990-08-21
EP0085868A1 (de) 1983-08-17
JPS58146844A (ja) 1983-09-01
US4583857A (en) 1986-04-22
DE3361734D1 (en) 1986-02-20

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