DE69942744D1 - System und verfahren zum vermindern der inter-pixel-verzerrung bei dynamischer redefinition von anzeigesegmentgrenzen - Google Patents
System und verfahren zum vermindern der inter-pixel-verzerrung bei dynamischer redefinition von anzeigesegmentgrenzenInfo
- Publication number
- DE69942744D1 DE69942744D1 DE69942744T DE69942744T DE69942744D1 DE 69942744 D1 DE69942744 D1 DE 69942744D1 DE 69942744 T DE69942744 T DE 69942744T DE 69942744 T DE69942744 T DE 69942744T DE 69942744 D1 DE69942744 D1 DE 69942744D1
- Authority
- DE
- Germany
- Prior art keywords
- display
- logical segments
- rows
- segments
- interpixel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000005684 electric field Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/074,998 US6121948A (en) | 1998-05-08 | 1998-05-08 | System and method for reducing inter-pixel distortion by dynamic redefinition of display segment boundaries |
| PCT/US1999/010017 WO1999059126A1 (en) | 1998-05-08 | 1999-05-07 | System and method for reducing inter-pixel distortion by dynamic redefinition of display segment boundaries |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE69942744D1 true DE69942744D1 (de) | 2010-10-21 |
Family
ID=22122910
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69942744T Expired - Lifetime DE69942744D1 (de) | 1998-05-08 | 1999-05-07 | System und verfahren zum vermindern der inter-pixel-verzerrung bei dynamischer redefinition von anzeigesegmentgrenzen |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6121948A (enExample) |
| EP (1) | EP1093653B1 (enExample) |
| JP (1) | JP4524041B2 (enExample) |
| CN (1) | CN1150502C (enExample) |
| AT (1) | ATE480850T1 (enExample) |
| CA (1) | CA2331692C (enExample) |
| DE (1) | DE69942744D1 (enExample) |
| WO (1) | WO1999059126A1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9583031B2 (en) | 2002-05-10 | 2017-02-28 | Jasper Display Corp. | Modulation scheme for driving digital display systems |
| US11030942B2 (en) | 2017-10-13 | 2021-06-08 | Jasper Display Corporation | Backplane adaptable to drive emissive pixel arrays of differing pitches |
| US10951875B2 (en) | 2018-07-03 | 2021-03-16 | Raxium, Inc. | Display processing circuitry |
| US11710445B2 (en) | 2019-01-24 | 2023-07-25 | Google Llc | Backplane configurations and operations |
| US11637219B2 (en) | 2019-04-12 | 2023-04-25 | Google Llc | Monolithic integration of different light emitting structures on a same substrate |
| US11238782B2 (en) | 2019-06-28 | 2022-02-01 | Jasper Display Corp. | Backplane for an array of emissive elements |
| US11626062B2 (en) | 2020-02-18 | 2023-04-11 | Google Llc | System and method for modulating an array of emissive elements |
| JP7581367B2 (ja) | 2020-04-06 | 2024-11-12 | グーグル エルエルシー | バックプレーン及びディスプレイアセンブリ |
| US11538431B2 (en) | 2020-06-29 | 2022-12-27 | Google Llc | Larger backplane suitable for high speed applications |
| US12244786B2 (en) | 2020-12-21 | 2025-03-04 | Google Llc | High density pixel arrays for auto-viewed 3D displays |
| WO2023287936A1 (en) | 2021-07-14 | 2023-01-19 | Google Llc | Backplane and method for pulse width modulation |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2941956B2 (ja) * | 1989-12-20 | 1999-08-30 | キヤノン株式会社 | 表示装置および表示システムおよび記録装置 |
| JPH0497126A (ja) * | 1990-08-16 | 1992-03-30 | Internatl Business Mach Corp <Ibm> | 液晶表示装置 |
| CA2063744C (en) * | 1991-04-01 | 2002-10-08 | Paul M. Urbanus | Digital micromirror device architecture and timing for use in a pulse-width modulated display system |
| JPH06222330A (ja) * | 1993-01-25 | 1994-08-12 | Hitachi Ltd | 液晶表示装置 |
| JP3476241B2 (ja) * | 1994-02-25 | 2003-12-10 | 株式会社半導体エネルギー研究所 | アクティブマトリクス型表示装置の表示方法 |
| JP3298301B2 (ja) * | 1994-04-18 | 2002-07-02 | カシオ計算機株式会社 | 液晶駆動装置 |
| US5508716A (en) * | 1994-06-10 | 1996-04-16 | In Focus Systems, Inc. | Plural line liquid crystal addressing method and apparatus |
| JP2743841B2 (ja) * | 1994-07-28 | 1998-04-22 | 日本電気株式会社 | 液晶表示装置 |
| JP3560756B2 (ja) * | 1997-02-13 | 2004-09-02 | アルプス電気株式会社 | 表示装置の駆動方法 |
-
1998
- 1998-05-08 US US09/074,998 patent/US6121948A/en not_active Expired - Lifetime
-
1999
- 1999-05-07 EP EP99921766A patent/EP1093653B1/en not_active Expired - Lifetime
- 1999-05-07 WO PCT/US1999/010017 patent/WO1999059126A1/en not_active Ceased
- 1999-05-07 DE DE69942744T patent/DE69942744D1/de not_active Expired - Lifetime
- 1999-05-07 JP JP2000548858A patent/JP4524041B2/ja not_active Expired - Fee Related
- 1999-05-07 CN CNB998070513A patent/CN1150502C/zh not_active Expired - Fee Related
- 1999-05-07 AT AT99921766T patent/ATE480850T1/de not_active IP Right Cessation
- 1999-05-07 CA CA002331692A patent/CA2331692C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN1304521A (zh) | 2001-07-18 |
| JP2002514795A (ja) | 2002-05-21 |
| US6121948A (en) | 2000-09-19 |
| WO1999059126A1 (en) | 1999-11-18 |
| CA2331692A1 (en) | 1999-11-18 |
| EP1093653A4 (en) | 2007-10-31 |
| JP4524041B2 (ja) | 2010-08-11 |
| EP1093653A1 (en) | 2001-04-25 |
| ATE480850T1 (de) | 2010-09-15 |
| CN1150502C (zh) | 2004-05-19 |
| CA2331692C (en) | 2007-09-25 |
| EP1093653B1 (en) | 2010-09-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R082 | Change of representative |
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| R097 | No opposition filed against granted patent, or epo opposition proceedings concluded without decision |
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