DE69903704D1 - Datenverarbeitungseinheit mit einer Koprozessorschnittstelle - Google Patents

Datenverarbeitungseinheit mit einer Koprozessorschnittstelle

Info

Publication number
DE69903704D1
DE69903704D1 DE69903704T DE69903704T DE69903704D1 DE 69903704 D1 DE69903704 D1 DE 69903704D1 DE 69903704 T DE69903704 T DE 69903704T DE 69903704 T DE69903704 T DE 69903704T DE 69903704 D1 DE69903704 D1 DE 69903704D1
Authority
DE
Germany
Prior art keywords
processing unit
data processing
coprocessor interface
coprocessor
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69903704T
Other languages
English (en)
Inventor
Rod G Fleck
Roger D Arnold
Bruce K Holmer
Danielle G Lemay
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies North America Corp
Original Assignee
Infineon Technologies North America Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies North America Corp filed Critical Infineon Technologies North America Corp
Application granted granted Critical
Publication of DE69903704D1 publication Critical patent/DE69903704D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
DE69903704T 1998-11-09 1999-08-26 Datenverarbeitungseinheit mit einer Koprozessorschnittstelle Expired - Lifetime DE69903704D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/189,111 US6434689B2 (en) 1998-11-09 1998-11-09 Data processing unit with interface for sharing registers by a processor and a coprocessor

Publications (1)

Publication Number Publication Date
DE69903704D1 true DE69903704D1 (de) 2002-12-05

Family

ID=22695981

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69903704T Expired - Lifetime DE69903704D1 (de) 1998-11-09 1999-08-26 Datenverarbeitungseinheit mit einer Koprozessorschnittstelle

Country Status (3)

Country Link
US (1) US6434689B2 (de)
EP (1) EP1001335B1 (de)
DE (1) DE69903704D1 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6505290B1 (en) * 1997-09-05 2003-01-07 Motorola, Inc. Method and apparatus for interfacing a processor to a coprocessor
JP2001092662A (ja) * 1999-09-22 2001-04-06 Toshiba Corp プロセッサコア及びこれを用いたプロセッサ
JP2002041489A (ja) * 2000-07-25 2002-02-08 Mitsubishi Electric Corp 同期信号生成回路、それを用いたプロセッサシステムおよび同期信号生成方法
JP4125475B2 (ja) * 2000-12-12 2008-07-30 株式会社東芝 Ｒｔｌ生成システム、ｒｔｌ生成方法、ｒｔｌ生成プログラム及び半導体装置の製造方法
US7376811B2 (en) * 2001-11-06 2008-05-20 Netxen, Inc. Method and apparatus for performing computations and operations on data using data steering
US6886092B1 (en) * 2001-11-19 2005-04-26 Xilinx, Inc. Custom code processing in PGA by providing instructions from fixed logic processor portion to programmable dedicated processor portion
US7600096B2 (en) * 2002-11-19 2009-10-06 Stmicroelectronics, Inc. Coprocessor extension architecture built using a novel split-instruction transaction model
EP1573571A2 (de) * 2002-12-12 2005-09-14 Koninklijke Philips Electronics N.V. Modulare integration eines array-prozessors in ein system auf dem chip
US6996785B1 (en) 2003-04-25 2006-02-07 Universal Network Machines, Inc . On-chip packet-based interconnections using repeaters/routers
US20050071830A1 (en) * 2003-09-30 2005-03-31 Starcore, Llc Method and system for processing a sequence of instructions
US7441106B2 (en) * 2004-07-02 2008-10-21 Seagate Technology Llc Distributed processing in a multiple processing unit environment
JP2006048661A (ja) * 2004-07-06 2006-02-16 Matsushita Electric Ind Co Ltd プロセッサとコプロセッサとの間でのデータ転送を制御する演算処理装置
US7395410B2 (en) * 2004-07-06 2008-07-01 Matsushita Electric Industrial Co., Ltd. Processor system with an improved instruction decode control unit that controls data transfer between processor and coprocessor
US7590823B1 (en) 2004-08-06 2009-09-15 Xilinx, Inc. Method and system for handling an instruction not supported in a coprocessor formed using configurable logic
US7546441B1 (en) * 2004-08-06 2009-06-09 Xilinx, Inc. Coprocessor interface controller
US7346759B1 (en) 2004-08-06 2008-03-18 Xilinx, Inc. Decoder interface
US7590822B1 (en) 2004-08-06 2009-09-15 Xilinx, Inc. Tracking an instruction through a processor pipeline
CN101076985A (zh) * 2004-12-14 2007-11-21 皇家飞利浦电子股份有限公司 可编程信号处理电路和解调方法
US7587579B2 (en) * 2004-12-28 2009-09-08 Ceva D.S.P. Ltd. Processor core interface for providing external hardware modules with access to registers of the core and methods thereof
JP3867804B2 (ja) * 2005-03-22 2007-01-17 セイコーエプソン株式会社 集積回路装置
US20060230213A1 (en) * 2005-03-29 2006-10-12 Via Technologies, Inc. Digital signal system with accelerators and method for operating the same
US20070168646A1 (en) * 2006-01-17 2007-07-19 Jean-Francois Collard Data exchange between cooperating processors
JP2007200180A (ja) * 2006-01-30 2007-08-09 Nec Electronics Corp プロセッサシステム
JP2008310693A (ja) * 2007-06-15 2008-12-25 Panasonic Corp 情報処理装置
US7996656B2 (en) * 2007-09-25 2011-08-09 Intel Corporation Attaching and virtualizing reconfigurable logic units to a processor
US20090183161A1 (en) * 2008-01-16 2009-07-16 Pasi Kolinummi Co-processor for stream data processing
US8832464B2 (en) * 2009-03-31 2014-09-09 Oracle America, Inc. Processor and method for implementing instruction support for hash algorithms
US9317286B2 (en) * 2009-03-31 2016-04-19 Oracle America, Inc. Apparatus and method for implementing instruction support for the camellia cipher algorithm
US20100250965A1 (en) * 2009-03-31 2010-09-30 Olson Christopher H Apparatus and method for implementing instruction support for the advanced encryption standard (aes) algorithm
US20100246815A1 (en) * 2009-03-31 2010-09-30 Olson Christopher H Apparatus and method for implementing instruction support for the kasumi cipher algorithm
EP2525286A1 (de) 2011-05-17 2012-11-21 Nxp B.V. Koprozessorschnittstelle
CN102750127B (zh) * 2012-06-12 2015-06-24 清华大学 一种协处理器
US11132203B2 (en) * 2014-08-14 2021-09-28 Texas Instruments Incorporated System and method for synchronizing instruction execution between a central processor and a coprocessor
US11126537B2 (en) * 2019-05-02 2021-09-21 Microsoft Technology Licensing, Llc Coprocessor-based logging for time travel debugging
US11263014B2 (en) * 2019-08-05 2022-03-01 Arm Limited Sharing instruction encoding space between a coprocessor and auxiliary execution circuitry
CN113254070B (zh) * 2020-02-07 2024-01-02 阿里巴巴集团控股有限公司 加速单元、片上系统、服务器、数据中心和相关方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4547849A (en) 1981-12-09 1985-10-15 Glenn Louie Interface between a microprocessor and a coprocessor
US5021991A (en) * 1983-04-18 1991-06-04 Motorola, Inc. Coprocessor instruction format
JPS62214464A (ja) * 1986-03-17 1987-09-21 Hitachi Ltd データ処理システム
JPS63261449A (ja) * 1987-04-20 1988-10-28 Hitachi Ltd デ−タ処理装置
JPH01147656A (ja) * 1987-12-03 1989-06-09 Nec Corp マイクロプロセッサ
JP2741867B2 (ja) * 1988-05-27 1998-04-22 株式会社日立製作所 情報処理システムおよびプロセツサ
JPH0343827A (ja) * 1989-07-12 1991-02-25 Omron Corp ファジーマイクロコンピュータ
US5185872A (en) * 1990-02-28 1993-02-09 Intel Corporation System for executing different cycle instructions by selectively bypassing scoreboard register and canceling the execution of conditionally issued instruction if needed resources are busy
US5347181A (en) 1992-04-29 1994-09-13 Motorola, Inc. Interface control logic for embedding a microprocessor in a gate array
DE69429061T2 (de) 1993-10-29 2002-07-18 Advanced Micro Devices Inc Superskalarmikroprozessoren
FR2719926B1 (fr) * 1994-05-10 1996-06-07 Sgs Thomson Microelectronics Circuit électronique et procédé d'utilisation d'un coprocesseur.
US5507000A (en) 1994-09-26 1996-04-09 Bull Hn Information Systems Inc. Sharing of register stack by two execution units in a central processor
JP2987308B2 (ja) * 1995-04-28 1999-12-06 松下電器産業株式会社 情報処理装置
US5752071A (en) * 1995-07-17 1998-05-12 Intel Corporation Function coprocessor
US5603047A (en) * 1995-10-06 1997-02-11 Lsi Logic Corporation Superscalar microprocessor architecture
US5713039A (en) * 1995-12-05 1998-01-27 Advanced Micro Devices, Inc. Register file having multiple register storages for storing data from multiple data streams
US6061711A (en) * 1996-08-19 2000-05-09 Samsung Electronics, Inc. Efficient context saving and restoring in a multi-tasking computing system environment
US5983338A (en) * 1997-09-05 1999-11-09 Motorola, Inc. Method and apparatus for interfacing a processor to a coprocessor for communicating register write information
US5923893A (en) * 1997-09-05 1999-07-13 Motorola, Inc. Method and apparatus for interfacing a processor to a coprocessor

Also Published As

Publication number Publication date
EP1001335B1 (de) 2002-10-30
EP1001335A1 (de) 2000-05-17
US20010042193A1 (en) 2001-11-15
US6434689B2 (en) 2002-08-13

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