DE69837886D1 - Datensender - Google Patents

Datensender

Info

Publication number
DE69837886D1
DE69837886D1 DE69837886T DE69837886T DE69837886D1 DE 69837886 D1 DE69837886 D1 DE 69837886D1 DE 69837886 T DE69837886 T DE 69837886T DE 69837886 T DE69837886 T DE 69837886T DE 69837886 D1 DE69837886 D1 DE 69837886D1
Authority
DE
Germany
Prior art keywords
data station
station
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69837886T
Other languages
English (en)
Other versions
DE69837886T2 (de
Inventor
Takefumi Yoshikawa
Toru Iwata
Hiroyuki Yamauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE69837886D1 publication Critical patent/DE69837886D1/de
Publication of DE69837886T2 publication Critical patent/DE69837886T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017545—Coupling arrangements; Impedance matching circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Dc Digital Transmission (AREA)
  • Logic Circuits (AREA)
DE69837886T 1997-09-02 1998-09-01 Datensender Expired - Lifetime DE69837886T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP23678297 1997-09-02
JP23678297 1997-09-02
PCT/JP1998/003896 WO1999012262A1 (fr) 1997-09-02 1998-09-01 Emetteur de donnees

Publications (2)

Publication Number Publication Date
DE69837886D1 true DE69837886D1 (de) 2007-07-19
DE69837886T2 DE69837886T2 (de) 2008-02-14

Family

ID=17005721

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69837886T Expired - Lifetime DE69837886T2 (de) 1997-09-02 1998-09-01 Datensender

Country Status (7)

Country Link
US (1) US6323756B1 (de)
EP (1) EP1014584B1 (de)
JP (1) JP3498843B2 (de)
KR (1) KR100389222B1 (de)
CA (1) CA2302939C (de)
DE (1) DE69837886T2 (de)
WO (1) WO1999012262A1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI221377B (en) * 2001-03-16 2004-09-21 Via Tech Inc Data transmission circuit and related method
US6483354B1 (en) * 2001-08-24 2002-11-19 Lsi Logic Corporation PCI-X driver control
DE10142410A1 (de) * 2001-08-31 2003-04-03 Bosch Gmbh Robert Versorgungsleitungsstruktur zur Energieversorgung von elektrischen Komponenten eines Kraftfahrzeugs
JP3587814B2 (ja) * 2001-11-28 2004-11-10 ローム株式会社 データ伝送システム及びケーブル
US7093041B2 (en) * 2001-12-20 2006-08-15 Lsi Logic Corporation Dual purpose PCI-X DDR configurable terminator/driver
GB0208014D0 (en) * 2002-04-05 2002-05-15 Acuid Corp Ltd Line termination incorporating compensation for device and package parasites
KR100930789B1 (ko) 2003-04-29 2009-12-09 매그나칩 반도체 유한회사 출력 드라이버의 출력신호 레벨을 가변할 수 있는 반도체장치
KR100666177B1 (ko) * 2005-09-30 2007-01-09 삼성전자주식회사 모드 레지스터 셋트를 이용하여 초기강화 드라이버의 임피던스 및 강도를 제어하는 출력 드라이버
KR101158410B1 (ko) 2010-10-29 2012-06-22 (주) 코콤 음성 라인을 이용한 디지털 데이터 통신 시스템, 디지털 데이터 송신 장치 및 디지털 데이터 수신 장치
JPWO2012114392A1 (ja) * 2011-02-25 2014-07-07 パナソニック株式会社 入力保護回路
US8766674B1 (en) * 2013-03-15 2014-07-01 Qualcomm Incorporated Current-mode buffer with output swing detector for high frequency clock interconnect
US9548734B1 (en) * 2015-12-26 2017-01-17 Intel Corporation Smart impedance matching for high-speed I/O

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3657478A (en) 1969-12-30 1972-04-18 Honeywell Inc Interconnection bus system
US4450370A (en) 1979-01-31 1984-05-22 Phillips Petroleum Company Active termination for a transmission line
US4623871A (en) * 1984-06-04 1986-11-18 Yamatake Honeywell Receiving apparatus
JPS62136145A (ja) 1985-12-09 1987-06-19 Fuji Facom Corp １：ｎデ−タ伝送方式
JPS63131436A (ja) 1986-11-20 1988-06-03 Fujitsu General Ltd プラズマデイスプレイパネルの駆動装置
JPS63131436U (de) * 1987-02-20 1988-08-29
KR100225594B1 (ko) 1991-03-29 1999-10-15 가나이 쯔도무 반도체 집적회로장치에서 실행되는 전류구동신호 인터페이스
JPH04315335A (ja) 1991-04-15 1992-11-06 Matsushita Electric Works Ltd 多重伝送システム
JPH0667772A (ja) 1992-08-14 1994-03-11 Ricoh Co Ltd データ伝送装置
US5398025A (en) * 1992-11-10 1995-03-14 Modicon, Inc. Input module
US5635896A (en) * 1993-12-27 1997-06-03 Honeywell Inc. Locally powered control system having a remote sensing unit with a two wire connection
JPH07221624A (ja) 1994-02-04 1995-08-18 Hitachi Ltd 入出力インタフェース回路装置
US5604450A (en) 1995-07-27 1997-02-18 Intel Corporation High speed bidirectional signaling scheme
KR0167294B1 (ko) 1995-12-16 1999-01-15 문정환 순차엑세스를 위한 메모리장치
US6150922A (en) * 1997-01-23 2000-11-21 Lucent Technologies Inc. Serial communication technique
US5952914A (en) * 1997-09-10 1999-09-14 At&T Corp. Power line communication systems
US6154488A (en) * 1997-09-23 2000-11-28 Hunt Technologies, Inc. Low frequency bilateral communication over distributed power lines

Also Published As

Publication number Publication date
DE69837886T2 (de) 2008-02-14
WO1999012262A1 (fr) 1999-03-11
KR20010023574A (ko) 2001-03-26
EP1014584B1 (de) 2007-06-06
EP1014584A1 (de) 2000-06-28
JP3498843B2 (ja) 2004-02-23
CA2302939C (en) 2003-11-18
EP1014584A4 (de) 2001-02-07
KR100389222B1 (ko) 2003-06-27
US6323756B1 (en) 2001-11-27
CA2302939A1 (en) 1999-03-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP