DE69825527D1 - Schaltungsanordnung zur Erkennung eines Empfangsfehlers in einer asynchronen Übertragung - Google Patents

Schaltungsanordnung zur Erkennung eines Empfangsfehlers in einer asynchronen Übertragung

Info

Publication number
DE69825527D1
DE69825527D1 DE69825527T DE69825527T DE69825527D1 DE 69825527 D1 DE69825527 D1 DE 69825527D1 DE 69825527 T DE69825527 T DE 69825527T DE 69825527 T DE69825527 T DE 69825527T DE 69825527 D1 DE69825527 D1 DE 69825527D1
Authority
DE
Germany
Prior art keywords
detecting
circuit arrangement
reception error
asynchronous transmission
asynchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69825527T
Other languages
English (en)
Other versions
DE69825527T2 (de
Inventor
Didier Belot
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of DE69825527D1 publication Critical patent/DE69825527D1/de
Application granted granted Critical
Publication of DE69825527T2 publication Critical patent/DE69825527T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
DE69825527T 1997-05-28 1998-05-22 Schaltung zum Empfangsfehlernachweis in einer Asynchronübertragung Expired - Fee Related DE69825527T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9706820A FR2764146B1 (fr) 1997-05-28 1997-05-28 Circuit de detection d'erreur de reception dans une transmission asynchrone
FR9706820 1997-05-28

Publications (2)

Publication Number Publication Date
DE69825527D1 true DE69825527D1 (de) 2004-09-16
DE69825527T2 DE69825527T2 (de) 2005-09-01

Family

ID=9507535

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69825527T Expired - Fee Related DE69825527T2 (de) 1997-05-28 1998-05-22 Schaltung zum Empfangsfehlernachweis in einer Asynchronübertragung

Country Status (4)

Country Link
US (1) US6195784B1 (de)
EP (1) EP0883261B1 (de)
DE (1) DE69825527T2 (de)
FR (1) FR2764146B1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6606360B1 (en) * 1999-12-30 2003-08-12 Intel Corporation Method and apparatus for receiving data
DE102005006172A1 (de) * 2005-02-10 2006-08-24 Siemens Ag Schaltungsanordnung und Verfahren zur Datenübertragung
JP4616370B2 (ja) * 2008-06-18 2011-01-19 ファナック株式会社 シリアルデータの劣化検出回路を有する制御回路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4737971A (en) * 1986-04-07 1988-04-12 American Telephone And Telegraph Company Synchronization detection circuit
US4800340A (en) 1987-04-22 1989-01-24 Silicon System, Ins. Method and apparatus for generating a data recovery window
US4876701A (en) * 1987-11-30 1989-10-24 Tandem Computers Incorporated Synchronization failure detection
US4935942A (en) * 1989-03-16 1990-06-19 Western Digital Corporation Data sampling architecture
US4984255A (en) * 1989-11-15 1991-01-08 National Semiconductor Corporation Edge transition insensitive delay line system and method
US5331669A (en) * 1992-05-06 1994-07-19 Ologic Corporation Asynchronous pulse converter
US5463655A (en) 1993-02-17 1995-10-31 National Semiconductor Corporation Single-ended pulse gating circuit
JPH08139577A (ja) * 1994-11-07 1996-05-31 Mitsubishi Electric Corp 可変遅延回路

Also Published As

Publication number Publication date
US6195784B1 (en) 2001-02-27
EP0883261A1 (de) 1998-12-09
FR2764146B1 (fr) 1999-08-13
FR2764146A1 (fr) 1998-12-04
DE69825527T2 (de) 2005-09-01
EP0883261B1 (de) 2004-08-11

Similar Documents

Publication Publication Date Title
HK1017920A1 (en) Position detector, encoder board, position detecting method, timerand electronic device
DE69722403T2 (de) Banknote mit einer integrierten Schaltung
AU2795700A (en) Measurement report transmission in a telecommunications system
DE69939297D1 (de) Modularer Steckverbinder mit einer Leiterplatte
GB9822301D0 (en) Level measurement systems
DE69936159D1 (de) Verfahren zur Abstützung einer Leiterplatte
DE69729910D1 (de) Signalerfassung in einer Satellitenübertragungsanordnung
DE69320630T2 (de) Offset-Verminderung in einer Nulldetektorschaltung
GB2339555B (en) Drawing board
DE60044661D1 (de) Vorrichtung zur Detektion von Bildfehlern in einer redundanten Duplexübertragung
DE59701422D1 (de) Messvorrichtung zur ermittlung einer borkonzentration
GB2342053B (en) A dart board having an inductive detecting device
DE69825527D1 (de) Schaltungsanordnung zur Erkennung eines Empfangsfehlers in einer asynchronen Übertragung
DE69907073D1 (de) Verfahren zur Fehlerkontrolle in einer Paketübertragungsverbindung
FR2753819B1 (fr) Carte a circuit integre a connexion mixte
GB2339834B (en) Measuring instrument having a fixing device
DE69718252T2 (de) Erdung einer Leiterplatte
DE69826759D1 (de) Vorrichtung mit einer Breitbandverstärkerschaltung
DE59912971D1 (de) Integrierte Schaltung mit einer Selbsttesteinrichtung
DE59911081D1 (de) Einrichtung zur Kontaktierung einer Platine
AU2283400A (en) Fixing an electromotor on a printed board
DE50014917D1 (de) Schaltungsanordnung mit einer Datenübertragungsvorrichtung
DE29617239U1 (de) Steckverbindung für eine Flachbaugruppe
DE69727807D1 (de) In einer monostabilen Schaltung verwendbare integrierte Vorrichtung
DE29802000U1 (de) Leiterplattenklemme in Einpreßtechnik

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee