DE69814268D1 - Verfahren zur Anbindung eines Prozessors an einen Koprozessor - Google Patents

Verfahren zur Anbindung eines Prozessors an einen Koprozessor

Info

Publication number
DE69814268D1
DE69814268D1 DE69814268T DE69814268T DE69814268D1 DE 69814268 D1 DE69814268 D1 DE 69814268D1 DE 69814268 T DE69814268 T DE 69814268T DE 69814268 T DE69814268 T DE 69814268T DE 69814268 D1 DE69814268 D1 DE 69814268D1
Authority
DE
Germany
Prior art keywords
coprocessor
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69814268T
Other languages
English (en)
Other versions
DE69814268T2 (de
Inventor
William C Moyer
John Arends
Jeffrey W Scott
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of DE69814268D1 publication Critical patent/DE69814268D1/de
Publication of DE69814268T2 publication Critical patent/DE69814268T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30116—Shadow registers, e.g. coupled registers, not forming part of the register space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G06F9/3881—Arrangements for communication of instructions and data

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Microcomputers (AREA)
DE69814268T 1997-09-05 1998-08-24 Verfahren zur Anbindung eines Prozessors an einen Koprozessor Expired - Fee Related DE69814268T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/924,518 US6505290B1 (en) 1997-09-05 1997-09-05 Method and apparatus for interfacing a processor to a coprocessor
US924518 1997-09-05

Publications (2)

Publication Number Publication Date
DE69814268D1 true DE69814268D1 (de) 2003-06-12
DE69814268T2 DE69814268T2 (de) 2004-01-22

Family

ID=25450311

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69814268T Expired - Fee Related DE69814268T2 (de) 1997-09-05 1998-08-24 Verfahren zur Anbindung eines Prozessors an einen Koprozessor

Country Status (8)

Country Link
US (3) US6505290B1 (de)
EP (2) EP0901071B1 (de)
JP (1) JP3920994B2 (de)
KR (1) KR100563012B1 (de)
CN (3) CN1299218C (de)
DE (1) DE69814268T2 (de)
SG (2) SG102528A1 (de)
TW (1) TW385410B (de)

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CN102736895B (zh) * 2011-04-07 2015-06-10 中兴通讯股份有限公司 一种实现寄存器文件间的数据传输方法及装置
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CN105988773B (zh) 2015-02-10 2021-03-09 恩智浦美国有限公司 硬件接口组件和用于硬件接口组件的方法
CN106648400B (zh) * 2015-11-03 2020-04-03 华为终端有限公司 一种触摸数据上报的方法及电子设备
CN108076476B (zh) * 2016-11-18 2020-11-06 华为技术有限公司 用于传输数据的方法和装置
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CN111917471B (zh) * 2020-09-09 2021-09-28 西安工程大学 一种自由空间可见光通信系统及其通信性能优化算法

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Also Published As

Publication number Publication date
CN1307536C (zh) 2007-03-28
JP3920994B2 (ja) 2007-05-30
CN1983167A (zh) 2007-06-20
DE69814268T2 (de) 2004-01-22
US6505290B1 (en) 2003-01-07
EP0901071A3 (de) 1999-10-13
US6327647B1 (en) 2001-12-04
US7007154B2 (en) 2006-02-28
SG102528A1 (en) 2004-03-26
CN1560729A (zh) 2005-01-05
KR19990029361A (ko) 1999-04-26
EP0901071A2 (de) 1999-03-10
EP0901071B1 (de) 2003-05-07
CN100573445C (zh) 2009-12-23
SG103282A1 (en) 2004-04-29
KR100563012B1 (ko) 2007-04-10
EP1282035A1 (de) 2003-02-05
TW385410B (en) 2000-03-21
JPH11154144A (ja) 1999-06-08
CN1211012A (zh) 1999-03-17
CN1299218C (zh) 2007-02-07
US20020049894A1 (en) 2002-04-25

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Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US

8339 Ceased/non-payment of the annual fee