DE69807396T2 - Integrierte Schaltung mit selektiver Vorspannung der Transistoren fuer niedrige Spannung und geringen Ruhestrom und zugehörige Verfahren - Google Patents

Integrierte Schaltung mit selektiver Vorspannung der Transistoren fuer niedrige Spannung und geringen Ruhestrom und zugehörige Verfahren

Info

Publication number
DE69807396T2
DE69807396T2 DE69807396T DE69807396T DE69807396T2 DE 69807396 T2 DE69807396 T2 DE 69807396T2 DE 69807396 T DE69807396 T DE 69807396T DE 69807396 T DE69807396 T DE 69807396T DE 69807396 T2 DE69807396 T2 DE 69807396T2
Authority
DE
Germany
Prior art keywords
transistors
low
integrated circuit
associated methods
quiescent current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69807396T
Other languages
English (en)
Other versions
DE69807396D1 (de
Inventor
Tsiu Chiu Chan
Pervez Hassan Sagarwala
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
STMicroelectronics lnc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics lnc USA filed Critical STMicroelectronics lnc USA
Publication of DE69807396D1 publication Critical patent/DE69807396D1/de
Application granted granted Critical
Publication of DE69807396T2 publication Critical patent/DE69807396T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G11C5/146—Substrate bias generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Control Of Electrical Variables (AREA)
  • Dram (AREA)
DE69807396T 1997-06-02 1998-05-15 Integrierte Schaltung mit selektiver Vorspannung der Transistoren fuer niedrige Spannung und geringen Ruhestrom und zugehörige Verfahren Expired - Fee Related DE69807396T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/867,538 US5929695A (en) 1997-06-02 1997-06-02 Integrated circuit having selective bias of transistors for low voltage and low standby current and related methods

Publications (2)

Publication Number Publication Date
DE69807396D1 DE69807396D1 (de) 2002-10-02
DE69807396T2 true DE69807396T2 (de) 2003-04-10

Family

ID=25349980

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69807396T Expired - Fee Related DE69807396T2 (de) 1997-06-02 1998-05-15 Integrierte Schaltung mit selektiver Vorspannung der Transistoren fuer niedrige Spannung und geringen Ruhestrom und zugehörige Verfahren

Country Status (4)

Country Link
US (1) US5929695A (de)
EP (1) EP0883052B1 (de)
JP (1) JPH11102229A (de)
DE (1) DE69807396T2 (de)

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US6232827B1 (en) 1997-06-20 2001-05-15 Intel Corporation Transistors providing desired threshold voltage and reduced short channel effects with forward body bias
US6100751A (en) * 1997-06-20 2000-08-08 Intel Corporation Forward body biased field effect transistor providing decoupling capacitance
US6218895B1 (en) * 1997-06-20 2001-04-17 Intel Corporation Multiple well transistor circuits having forward body bias
US6593799B2 (en) 1997-06-20 2003-07-15 Intel Corporation Circuit including forward body bias from supply voltage and ground nodes
US6300819B1 (en) 1997-06-20 2001-10-09 Intel Corporation Circuit including forward body bias from supply voltage and ground nodes
US6448840B2 (en) * 1999-11-30 2002-09-10 Intel Corporation Adaptive body biasing circuit and method
TW501278B (en) * 2000-06-12 2002-09-01 Intel Corp Apparatus and circuit having reduced leakage current and method therefor
US6605981B2 (en) 2001-04-26 2003-08-12 International Business Machines Corporation Apparatus for biasing ultra-low voltage logic circuits
US6621325B2 (en) * 2001-09-18 2003-09-16 Xilinx, Inc. Structures and methods for selectively applying a well bias to portions of a programmable device
JP2004222119A (ja) * 2003-01-17 2004-08-05 Renesas Technology Corp 半導体集積回路
JP4221274B2 (ja) * 2003-10-31 2009-02-12 株式会社東芝 半導体集積回路および電源電圧・基板バイアス制御回路
US7248988B2 (en) * 2004-03-01 2007-07-24 Transmeta Corporation System and method for reducing temperature variation during burn in
DE102004029520B4 (de) * 2004-06-18 2008-12-24 Infineon Technologies Ag Transistor-Anordnung mit Rauscherfassung
US7060566B2 (en) * 2004-06-22 2006-06-13 Infineon Technologies Ag Standby current reduction over a process window with a trimmable well bias
TWI336061B (en) * 2006-08-10 2011-01-11 Au Optronics Corp Display apparatus and enable circuit thereof
US7683696B1 (en) * 2007-12-26 2010-03-23 Exar Corporation Open-drain output buffer for single-voltage-supply CMOS
US7893712B1 (en) 2009-09-10 2011-02-22 Xilinx, Inc. Integrated circuit with a selectable interconnect circuit for low power or high performance operation
US9016627B2 (en) 2009-10-02 2015-04-28 Panasonic Avionics Corporation System and method for providing an integrated user interface system at a seat
FR2964794A1 (fr) 2010-09-14 2012-03-16 St Microelectronics Sa Circuit de polarisation dynamique du substrat d'un transistor
US9449976B2 (en) * 2013-12-12 2016-09-20 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure and method for manufacturing the same
TWI708134B (zh) * 2019-09-18 2020-10-21 新唐科技股份有限公司 基體偏壓產生電路

Family Cites Families (21)

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Publication number Priority date Publication date Assignee Title
US3702990A (en) * 1971-02-02 1972-11-14 Rca Corp Variable threshold memory system using minimum amplitude signals
US4142114A (en) * 1977-07-18 1979-02-27 Mostek Corporation Integrated circuit with threshold regulation
US4458212A (en) * 1981-12-30 1984-07-03 Mostek Corporation Compensated amplifier having pole zero tracking
US5297097A (en) * 1988-06-17 1994-03-22 Hitachi Ltd. Large scale integrated circuit for low voltage operation
IT1225608B (it) * 1988-07-06 1990-11-22 Sgs Thomson Microelectronics Regolazione della tensione prodotta da un moltiplicatore di tensione.
IT1225612B (it) * 1988-07-29 1990-11-22 Sgs Thomson Microelectronics Processo di fabbricazione di dispositivi integrati cmos con lunghezza di gate ridotta e transistori a canale superficiale
FR2659165A1 (fr) * 1990-03-05 1991-09-06 Sgs Thomson Microelectronics Memoire ultra-rapide comportant un limiteur de la tension de drain des cellules.
US5099148A (en) * 1990-10-22 1992-03-24 Sgs-Thomson Microelectronics, Inc. Integrated circuit having multiple data outputs sharing a resistor network
JP3253389B2 (ja) * 1992-03-31 2002-02-04 株式会社東芝 半導体集積回路装置
US5583457A (en) * 1992-04-14 1996-12-10 Hitachi, Ltd. Semiconductor integrated circuit device having power reduction mechanism
US5461338A (en) * 1992-04-17 1995-10-24 Nec Corporation Semiconductor integrated circuit incorporated with substrate bias control circuit
US5394026A (en) * 1993-02-02 1995-02-28 Motorola Inc. Substrate bias generating circuit
US5397934A (en) * 1993-04-05 1995-03-14 National Semiconductor Corporation Apparatus and method for adjusting the threshold voltage of MOS transistors
US5349220A (en) * 1993-08-10 1994-09-20 United Microelectronics Corporation Flash memory cell and its operation
JP3110262B2 (ja) * 1993-11-15 2000-11-20 松下電器産業株式会社 半導体装置及び半導体装置のオペレーティング方法
KR0169157B1 (ko) * 1993-11-29 1999-02-01 기다오까 다까시 반도체 회로 및 mos-dram
JP3085073B2 (ja) * 1994-01-24 2000-09-04 富士通株式会社 スタティックｒａｍ
JP2822881B2 (ja) * 1994-03-30 1998-11-11 日本電気株式会社 半導体集積回路装置
US5612645A (en) * 1995-12-01 1997-03-18 Sun Microsystems, Inc. Dynamic MOSFET threshold voltage controller
US5883544A (en) * 1996-12-03 1999-03-16 Stmicroelectronics, Inc. Integrated circuit actively biasing the threshold voltage of transistors and related methods
US5834966A (en) * 1996-12-08 1998-11-10 Stmicroelectronics, Inc. Integrated circuit sensing and digitally biasing the threshold voltage of transistors and related methods

Also Published As

Publication number Publication date
JPH11102229A (ja) 1999-04-13
EP0883052A1 (de) 1998-12-09
EP0883052B1 (de) 2002-08-28
US5929695A (en) 1999-07-27
DE69807396D1 (de) 2002-10-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee