DE69730175D1 - PLL-Frequenzsynthetisierer - Google Patents

PLL-Frequenzsynthetisierer

Info

Publication number
DE69730175D1
DE69730175D1 DE69730175T DE69730175T DE69730175D1 DE 69730175 D1 DE69730175 D1 DE 69730175D1 DE 69730175 T DE69730175 T DE 69730175T DE 69730175 T DE69730175 T DE 69730175T DE 69730175 D1 DE69730175 D1 DE 69730175D1
Authority
DE
Germany
Prior art keywords
frequency synthesizer
pll frequency
pll
synthesizer
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69730175T
Other languages
English (en)
Other versions
DE69730175T2 (de
Inventor
Jun Jokura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69730175D1 publication Critical patent/DE69730175D1/de
Publication of DE69730175T2 publication Critical patent/DE69730175T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/18Temporarily disabling, deactivating or stopping the frequency counter or divider
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
DE69730175T 1996-05-29 1997-05-30 PLL-Frequenzsynthetisierer Expired - Fee Related DE69730175T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP13451596 1996-05-29
JP8134515A JP2914297B2 (ja) 1996-05-29 1996-05-29 Pll周波数シンセサイザ

Publications (2)

Publication Number Publication Date
DE69730175D1 true DE69730175D1 (de) 2004-09-16
DE69730175T2 DE69730175T2 (de) 2004-12-30

Family

ID=15130137

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69730175T Expired - Fee Related DE69730175T2 (de) 1996-05-29 1997-05-30 PLL-Frequenzsynthetisierer

Country Status (4)

Country Link
US (1) US5856761A (de)
EP (1) EP0810736B1 (de)
JP (1) JP2914297B2 (de)
DE (1) DE69730175T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109584773A (zh) * 2018-12-24 2019-04-05 惠科股份有限公司 时序控制方法、时序控制芯片和显示装置

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000045515A1 (fr) * 1999-01-29 2000-08-03 Sanyo Electric Co., Ltd. Appareil a boucle a phase asservie (pll) et dispositif de repartition en frequence variable
WO2001017113A1 (fr) * 1999-08-26 2001-03-08 Sanyo Electric Co., Ltd. Boucle a phase asservie
US6265947B1 (en) * 2000-01-11 2001-07-24 Ericsson Inc. Power conserving phase-locked loop and method
US7125477B2 (en) * 2000-02-17 2006-10-24 Applied Materials, Inc. Contacts for electrochemical processing
US6326851B1 (en) * 2000-06-26 2001-12-04 Texas Instruments Incorporated Digital phase-domain PLL frequency synthesizer
US6362988B1 (en) * 2000-06-29 2002-03-26 Ford Global Tech., Inc. System and method for synchronizing the phase angle for an AC power source in parallel operation with a grid
JP2002208858A (ja) * 2001-01-10 2002-07-26 Matsushita Electric Ind Co Ltd 周波数シンセサイザと周波数生成方法
ATE344499T1 (de) 2001-06-15 2006-11-15 Analog Devices Inc Interpolator mit variablem modul und variabler frequenzsynthesizer mit dem interpolator mit variablem modul
US6919650B2 (en) * 2002-05-31 2005-07-19 Ballard Power Systems Corporation Hybrid synchronization phase angle generation method
US6791906B1 (en) * 2003-10-30 2004-09-14 Hewlett-Packard Development Company, L.P. Method and system for fail-safe control of a frequency synthesizer
US7567642B2 (en) * 2003-12-23 2009-07-28 Analog Devices, Inc. Phase detector with extended linear operating range
GB2430090B (en) * 2005-09-08 2007-10-17 Motorola Inc RF synthesizer and RF transmitter or receiver incorporating the synthesizer
US9029461B2 (en) * 2009-02-06 2015-05-12 Eastman Chemical Company Aliphatic polyester coating compositions containing tetramethyl cyclobutanediol
JP6725187B2 (ja) 2018-03-09 2020-07-15 三菱電機株式会社 Pll回路

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3571743A (en) * 1968-10-30 1971-03-23 Rca Corp Phase lock loop
DE4121361A1 (de) * 1991-06-28 1993-01-07 Philips Patentverwaltung Frequenzsynthese-schaltung
JP2993200B2 (ja) * 1991-07-31 1999-12-20 日本電気株式会社 位相同期ループ
JPH05291950A (ja) * 1992-04-15 1993-11-05 Mitsubishi Electric Corp フェーズロックドループ周波数シンセサイザ
JPH07302938A (ja) * 1994-04-28 1995-11-14 Sony Corp 圧電セラミックトランス及びその製造方法
US5550515A (en) * 1995-01-27 1996-08-27 Opti, Inc. Multiphase clock synthesizer having a plurality of phase shifted inputs to a plurality of phase comparators in a phase locked loop

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109584773A (zh) * 2018-12-24 2019-04-05 惠科股份有限公司 时序控制方法、时序控制芯片和显示装置

Also Published As

Publication number Publication date
JPH09321617A (ja) 1997-12-12
US5856761A (en) 1999-01-05
DE69730175T2 (de) 2004-12-30
EP0810736A1 (de) 1997-12-03
EP0810736B1 (de) 2004-08-11
JP2914297B2 (ja) 1999-06-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee