DE69810881D1 - Frequenzteiler - Google Patents

Frequenzteiler

Info

Publication number
DE69810881D1
DE69810881D1 DE69810881T DE69810881T DE69810881D1 DE 69810881 D1 DE69810881 D1 DE 69810881D1 DE 69810881 T DE69810881 T DE 69810881T DE 69810881 T DE69810881 T DE 69810881T DE 69810881 D1 DE69810881 D1 DE 69810881D1
Authority
DE
Germany
Prior art keywords
frequency divider
divider
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69810881T
Other languages
English (en)
Other versions
DE69810881T2 (de
Inventor
Naoki Ueno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Precision Circuits Inc
Original Assignee
Nippon Precision Circuits Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Precision Circuits Inc filed Critical Nippon Precision Circuits Inc
Publication of DE69810881D1 publication Critical patent/DE69810881D1/de
Application granted granted Critical
Publication of DE69810881T2 publication Critical patent/DE69810881T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H03K23/50—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits
    • H03K23/502—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits with a base or a radix other than a power of two
    • H03K23/505—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits with a base or a radix other than a power of two with a base which is an odd number
DE69810881T 1997-11-19 1998-11-11 Frequenzteiler Expired - Fee Related DE69810881T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31786197A JP3572908B2 (ja) 1997-11-19 1997-11-19 分周回路

Publications (2)

Publication Number Publication Date
DE69810881D1 true DE69810881D1 (de) 2003-02-27
DE69810881T2 DE69810881T2 (de) 2003-08-07

Family

ID=18092888

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69810881T Expired - Fee Related DE69810881T2 (de) 1997-11-19 1998-11-11 Frequenzteiler

Country Status (4)

Country Link
US (1) US6072850A (de)
EP (1) EP0918395B1 (de)
JP (1) JP3572908B2 (de)
DE (1) DE69810881T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6510480B1 (en) * 1998-08-25 2003-01-21 Matsushita Electric Industrial Co., Ltd. Data transfer circuit and data processing method using data transfer circuit for handling interruption processing
US6707326B1 (en) * 1999-08-06 2004-03-16 Skyworks Solutions, Inc. Programmable frequency divider
KR100379464B1 (ko) * 1999-12-30 2003-04-10 엘지전자 주식회사 분주 회로
JP4717233B2 (ja) * 2001-03-14 2011-07-06 ルネサスエレクトロニクス株式会社 クロック供給バイアス回路及びそれを用いた単相クロック駆動分周回路
KR100617489B1 (ko) * 2003-05-20 2006-09-01 니폰덴신뎅와 가부시키가이샤 가변 분주 방법 및 가변 분주기
KR100573311B1 (ko) * 2004-02-02 2006-04-24 학교법인 한양학원 비반전 출력을 가지는 2단 플립플롭
JP2006162795A (ja) * 2004-12-03 2006-06-22 Nidec Sankyo Corp ポリゴンミラー駆動モータ及びレーザミラー照射装置
US7403048B2 (en) * 2005-06-01 2008-07-22 Wilinx Corporation Divider circuits and methods using in-phase and quadrature signals
US7411432B1 (en) * 2006-07-31 2008-08-12 Lattice Semiconductor Corporation Integrated circuits and complementary CMOS circuits for frequency dividers
US7656234B2 (en) * 2007-10-19 2010-02-02 Advantest Corporation Circuit and oscillating apparatus
KR100975040B1 (ko) 2008-09-02 2010-08-11 고려대학교 산학협력단 프로그램 가능한 주파수 분주기 및 분주 방법
JP2010258642A (ja) * 2009-04-23 2010-11-11 Renesas Electronics Corp フリップフロップ回路及びそれを備えたプリスケーラ回路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60204120A (ja) * 1984-03-29 1985-10-15 Toshiba Corp 可変分周回路
GB8428092D0 (en) * 1984-11-07 1984-12-12 Plessey Co Plc Logic circuits
US4703495A (en) * 1986-05-23 1987-10-27 Advanced Micro Device, Inc. High speed frequency divide-by-5 circuit
JPH03171820A (ja) * 1989-11-29 1991-07-25 Fujitsu Ltd ２ｎ―１分周回路
JP2853894B2 (ja) * 1990-08-24 1999-02-03 三菱電機株式会社 分周回路及びパルス信号作成回路
US5425074A (en) * 1993-12-17 1995-06-13 Intel Corporation Fast programmable/resettable CMOS Johnson counters
US5859890A (en) * 1997-02-26 1999-01-12 Motorola, Inc. Dual modulus prescaler

Also Published As

Publication number Publication date
EP0918395A3 (de) 2000-12-20
JP3572908B2 (ja) 2004-10-06
JPH11150472A (ja) 1999-06-02
US6072850A (en) 2000-06-06
DE69810881T2 (de) 2003-08-07
EP0918395A2 (de) 1999-05-26
EP0918395B1 (de) 2003-01-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee