DE69716011D1 - Verfahren zur Herstellung eines Speicherkondensators für DRAM-Speicherzelle - Google Patents
Verfahren zur Herstellung eines Speicherkondensators für DRAM-SpeicherzelleInfo
- Publication number
- DE69716011D1 DE69716011D1 DE69716011T DE69716011T DE69716011D1 DE 69716011 D1 DE69716011 D1 DE 69716011D1 DE 69716011 T DE69716011 T DE 69716011T DE 69716011 T DE69716011 T DE 69716011T DE 69716011 D1 DE69716011 D1 DE 69716011D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- memory cell
- capacitor
- memory
- dram
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000003990 capacitor Substances 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
- H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
- H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US3087896P | 1996-11-14 | 1996-11-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69716011D1 true DE69716011D1 (de) | 2002-11-07 |
DE69716011T2 DE69716011T2 (de) | 2003-06-05 |
Family
ID=21856484
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69716011T Expired - Lifetime DE69716011T2 (de) | 1996-11-14 | 1997-11-14 | Verfahren zur Herstellung eines Speicherkondensators für DRAM-Speicherzelle |
Country Status (6)
Country | Link |
---|---|
US (1) | US6617211B1 (de) |
EP (1) | EP0844667B1 (de) |
JP (1) | JPH10150167A (de) |
KR (1) | KR100506101B1 (de) |
DE (1) | DE69716011T2 (de) |
TW (1) | TW406415B (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4070919B2 (ja) * | 1999-01-22 | 2008-04-02 | 富士通株式会社 | 半導体装置及びその製造方法 |
US7026547B1 (en) | 2005-01-21 | 2006-04-11 | Infineon Technologies Ag | Semiconductor device and a method for fabricating a semiconductor device |
US7960797B2 (en) * | 2006-08-29 | 2011-06-14 | Micron Technology, Inc. | Semiconductor devices including fine pitch arrays with staggered contacts |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR940006682B1 (ko) * | 1991-10-17 | 1994-07-25 | 삼성전자 주식회사 | 반도체 메모리장치의 제조방법 |
JP2827728B2 (ja) * | 1992-08-03 | 1998-11-25 | 日本電気株式会社 | 半導体記憶装置およびその製造方法 |
US5563089A (en) * | 1994-07-20 | 1996-10-08 | Micron Technology, Inc. | Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells |
US5501998A (en) * | 1994-04-26 | 1996-03-26 | Industrial Technology Research Institution | Method for fabricating dynamic random access memory cells having vertical sidewall stacked storage capacitors |
JP2956482B2 (ja) * | 1994-07-29 | 1999-10-04 | 日本電気株式会社 | 半導体記憶装置及びその製造方法 |
JP3686129B2 (ja) * | 1995-08-28 | 2005-08-24 | 株式会社日立製作所 | 半導体集積回路装置の製造方法 |
US5545585A (en) * | 1996-01-29 | 1996-08-13 | Taiwan Semiconductor Manufacturing Company | Method of making a dram circuit with fin-shaped stacked capacitors |
US5554557A (en) * | 1996-02-02 | 1996-09-10 | Vanguard International Semiconductor Corp. | Method for fabricating a stacked capacitor with a self aligned node contact in a memory cell |
KR100223890B1 (ko) * | 1996-12-31 | 1999-10-15 | 구본준 | 반도체 메모리 소자 및 그의 제조 방법 |
-
1997
- 1997-11-13 KR KR1019970059788A patent/KR100506101B1/ko not_active IP Right Cessation
- 1997-11-14 US US08/971,014 patent/US6617211B1/en not_active Expired - Lifetime
- 1997-11-14 DE DE69716011T patent/DE69716011T2/de not_active Expired - Lifetime
- 1997-11-14 JP JP9313745A patent/JPH10150167A/ja active Pending
- 1997-11-14 EP EP97119999A patent/EP0844667B1/de not_active Expired - Lifetime
-
1998
- 1998-05-01 TW TW086117158A patent/TW406415B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR19980042388A (ko) | 1998-08-17 |
EP0844667B1 (de) | 2002-10-02 |
KR100506101B1 (ko) | 2006-04-21 |
EP0844667A2 (de) | 1998-05-27 |
JPH10150167A (ja) | 1998-06-02 |
DE69716011T2 (de) | 2003-06-05 |
TW406415B (en) | 2000-09-21 |
EP0844667A3 (de) | 2000-01-19 |
US6617211B1 (en) | 2003-09-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |