DE69711964D1 - Integrierte Schaltungsanordnung mit einer den integrierten Schaltbaustein offenlegenden Öffnung und entsprechende Verfahren - Google Patents

Integrierte Schaltungsanordnung mit einer den integrierten Schaltbaustein offenlegenden Öffnung und entsprechende Verfahren

Info

Publication number
DE69711964D1
DE69711964D1 DE69711964T DE69711964T DE69711964D1 DE 69711964 D1 DE69711964 D1 DE 69711964D1 DE 69711964 T DE69711964 T DE 69711964T DE 69711964 T DE69711964 T DE 69711964T DE 69711964 D1 DE69711964 D1 DE 69711964D1
Authority
DE
Germany
Prior art keywords
integrated circuit
circuit die
integrated
circuit arrangement
switching module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69711964T
Other languages
English (en)
Other versions
DE69711964T2 (de
Inventor
Matthew M Salatino
S James Studebaker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harris Corp
Original Assignee
Harris Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/592,472 external-priority patent/US5956415A/en
Application filed by Harris Corp filed Critical Harris Corp
Publication of DE69711964D1 publication Critical patent/DE69711964D1/de
Application granted granted Critical
Publication of DE69711964T2 publication Critical patent/DE69711964T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86—Secure or tamper-resistant housings
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1306—Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00—Individual registration on entry or exit
    • G07C9/20—Individual registration on entry or exit involving the use of a pass
    • G07C9/22—Individual registration on entry or exit involving the use of a pass in combination with an identity check of the pass holder
    • G07C9/25—Individual registration on entry or exit involving the use of a pass in combination with an identity check of the pass holder using biometric data, e.g. fingerprints, iris scans or voice recognition
    • G07C9/26—Individual registration on entry or exit involving the use of a pass in combination with an identity check of the pass holder using biometric data, e.g. fingerprints, iris scans or voice recognition using a biometric sensor integrated in the pass
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C9/00—Individual registration on entry or exit
    • G07C9/30—Individual registration on entry or exit not involving the use of a pass
    • G07C9/32—Individual registration on entry or exit not involving the use of a pass in combination with an identity check
    • G07C9/37—Individual registration on entry or exit not involving the use of a pass in combination with an identity check using biometric data, e.g. fingerprints, iris scans or voice recognition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Image Input (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Credit Cards Or The Like (AREA)
  • Measurement Of The Respiration, Hearing Ability, Form, And Blood Characteristics Of Living Organisms (AREA)
DE69711964T 1996-01-26 1997-01-23 Integrierte Schaltungsanordnung mit einer den integrierten Schaltbaustein offenlegenden Öffnung und entsprechende Verfahren Expired - Lifetime DE69711964T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/592,472 US5956415A (en) 1996-01-26 1996-01-26 Enhanced security fingerprint sensor package and related methods
US08/671,430 US5862248A (en) 1996-01-26 1996-06-27 Integrated circuit device having an opening exposing the integrated circuit die and related methods

Publications (2)

Publication Number Publication Date
DE69711964D1 true DE69711964D1 (de) 2002-05-23
DE69711964T2 DE69711964T2 (de) 2002-11-28

Family

ID=27081459

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69711964T Expired - Lifetime DE69711964T2 (de) 1996-01-26 1997-01-23 Integrierte Schaltungsanordnung mit einer den integrierten Schaltbaustein offenlegenden Öffnung und entsprechende Verfahren

Country Status (5)

Country Link
EP (1) EP0789334B1 (de)
JP (1) JP4024335B2 (de)
CN (1) CN1183589C (de)
AT (1) ATE216519T1 (de)
DE (1) DE69711964T2 (de)

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DE19803020C2 (de) 1998-01-27 1999-12-02 Siemens Ag Chipkartenmodul für biometrische Sensoren
JP3898330B2 (ja) * 1998-03-12 2007-03-28 カシオ計算機株式会社 読取装置
US6784413B2 (en) 1998-03-12 2004-08-31 Casio Computer Co., Ltd. Reading apparatus for reading fingerprint
DE19831570A1 (de) * 1998-07-14 2000-01-20 Siemens Ag Biometrischer Sensor und Verfahren zu dessen Herstellung
DE19833928B4 (de) * 1998-07-28 2005-05-25 Infineon Technologies Ag Biometrische Sensoreinrichtung mit in einem Flexleiterband integrierten elektronischen Bauelementen
DE19834720C2 (de) * 1998-07-31 2000-09-14 Siemens Ag Sensoreinrichtung zur Erfassung von biometrischen Merkmalen
US6307258B1 (en) 1998-12-22 2001-10-23 Silicon Bandwidth, Inc. Open-cavity semiconductor die package
US6440814B1 (en) * 1998-12-30 2002-08-27 Stmicroelectronics, Inc. Electrostatic discharge protection for sensors
US6246566B1 (en) 1999-02-08 2001-06-12 Amkor Technology, Inc. Electrostatic discharge protection package and method
US6628812B1 (en) * 1999-05-11 2003-09-30 Authentec, Inc. Fingerprint sensor package having enhanced electrostatic discharge protection and associated methods
EP1059602B1 (de) * 1999-06-10 2006-12-13 Nippon Telegraph and Telephone Corporation Gerät zur Erkennung von Oberflächengestalten
US6423995B1 (en) * 1999-07-26 2002-07-23 Stmicroelectronics, Inc. Scratch protection for direct contact sensors
US6603192B2 (en) 1999-07-30 2003-08-05 Stmicroelectronics, Inc. Scratch resistance improvement by filling metal gaps
ATE280976T1 (de) * 2000-03-24 2004-11-15 Infineon Technologies Ag Gehäuse für biometrische sensorchips
NO315016B1 (no) * 2000-06-09 2003-06-23 Idex Asa Miniatyrisert sensor
US8015592B2 (en) 2002-03-28 2011-09-06 Innovation Connection Corporation System, method and apparatus for enabling transactions using a biometrically enabled programmable magnetic stripe
DE10109327A1 (de) * 2001-02-27 2002-09-12 Infineon Technologies Ag Halbleiterchip und Herstellungsverfahren für ein Gehäuse
NO316776B1 (no) * 2001-12-07 2004-05-03 Idex Asa Pakkelosning for fingeravtrykksensor
US7606398B2 (en) 2001-12-07 2009-10-20 Idex Asa Sensor for measurement for wet and dry fingers
DE10205127A1 (de) * 2002-02-07 2003-08-28 Infineon Technologies Ag Halbleiterbauteil mit Sensor- bzw. Aktoroberfläche und Verfahren zu seiner Herstellung
JP3766034B2 (ja) * 2002-02-20 2006-04-12 富士通株式会社 指紋センサ装置及びその製造方法
WO2003084124A1 (en) * 2002-03-28 2003-10-09 Innovation Connection Corporation Apparatus and method for transactions security using biometric identity validation and contactless smartcard.
US8082575B2 (en) 2002-03-28 2011-12-20 Rampart-Id Systems, Inc. System, method and apparatus for enabling transactions using a user enabled programmable magnetic stripe
FR2839570B1 (fr) * 2002-05-07 2004-09-17 Atmel Grenoble Sa Procede de fabrication de capteur d'empreinte digitale et capteur correspondant
JP3971674B2 (ja) * 2002-07-10 2007-09-05 富士通株式会社 接触型センサ内蔵半導体装置及びその製造方法
US7109574B2 (en) * 2002-07-26 2006-09-19 Stmicroelectronics, Inc. Integrated circuit package with exposed die surfaces and auxiliary attachment
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JP2004319530A (ja) * 2003-02-28 2004-11-11 Sanyo Electric Co Ltd 光半導体装置およびその製造方法
JP4160851B2 (ja) 2003-03-31 2008-10-08 富士通株式会社 指紋認識用半導体装置
WO2004093005A1 (ja) * 2003-04-15 2004-10-28 Fujitsu Limited 情報処理装置
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CN104035619B (zh) * 2014-06-13 2017-02-15 上海思立微电子科技有限公司 一种基于esd保护的生物识别感应装置
CN104035618B (zh) * 2014-06-13 2017-02-22 上海思立微电子科技有限公司 一种基于esd保护的生物识别感应装置
CN104051366B (zh) 2014-07-01 2017-06-20 苏州晶方半导体科技股份有限公司 指纹识别芯片封装结构和封装方法
JP5954365B2 (ja) * 2014-07-11 2016-07-20 セイコーエプソン株式会社 半導体装置、回路基板及び電子機器
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CN104966707A (zh) * 2015-04-30 2015-10-07 深圳莱宝高科技股份有限公司 指纹采集封装结构及其封装方法
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Also Published As

Publication number Publication date
JP4024335B2 (ja) 2007-12-19
EP0789334A3 (de) 1999-05-06
EP0789334A2 (de) 1997-08-13
ATE216519T1 (de) 2002-05-15
JPH09289268A (ja) 1997-11-04
CN1183589C (zh) 2005-01-05
DE69711964T2 (de) 2002-11-28
EP0789334B1 (de) 2002-04-17
CN1163477A (zh) 1997-10-29

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