DE69710522D1 - Verfahren zur Erzeugung einer variablen Frequenz und variabele Verzögerungszelle zur Durchführung des Verfahrens - Google Patents

Verfahren zur Erzeugung einer variablen Frequenz und variabele Verzögerungszelle zur Durchführung des Verfahrens

Info

Publication number
DE69710522D1
DE69710522D1 DE69710522T DE69710522T DE69710522D1 DE 69710522 D1 DE69710522 D1 DE 69710522D1 DE 69710522 T DE69710522 T DE 69710522T DE 69710522 T DE69710522 T DE 69710522T DE 69710522 D1 DE69710522 D1 DE 69710522D1
Authority
DE
Germany
Prior art keywords
generating
carrying
variable
delay cell
variable frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69710522T
Other languages
English (en)
Other versions
DE69710522T2 (de
Inventor
Jean-Marie Boudry
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SAS
Original Assignee
Bull SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SAS filed Critical Bull SAS
Application granted granted Critical
Publication of DE69710522D1 publication Critical patent/DE69710522D1/de
Publication of DE69710522T2 publication Critical patent/DE69710522T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/354—Astable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0315—Ring oscillators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019—Variable delay
    • H03K2005/00026—Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter
    • H03K2005/00032—Dc control of switching transistors
    • H03K2005/00039—Dc control of switching transistors having four transistors serially
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00195—Layout of the delay element using FET's

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Amplifiers (AREA)
  • Manipulation Of Pulses (AREA)
DE69710522T 1996-06-19 1997-06-09 Verfahren zur Erzeugung einer variablen Frequenz und variabele Verzögerungszelle zur Durchführung des Verfahrens Expired - Lifetime DE69710522T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9607604A FR2750268B1 (fr) 1996-06-19 1996-06-19 Procede pour obtenir un signal a frequence variable et cellule a retard variable adaptee a la mise en oeuvre de ce procede

Publications (2)

Publication Number Publication Date
DE69710522D1 true DE69710522D1 (de) 2002-03-28
DE69710522T2 DE69710522T2 (de) 2002-08-22

Family

ID=9493196

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69710522T Expired - Lifetime DE69710522T2 (de) 1996-06-19 1997-06-09 Verfahren zur Erzeugung einer variablen Frequenz und variabele Verzögerungszelle zur Durchführung des Verfahrens

Country Status (5)

Country Link
US (2) US5952891A (de)
EP (1) EP0814562B1 (de)
JP (1) JP3469431B2 (de)
DE (1) DE69710522T2 (de)
FR (1) FR2750268B1 (de)

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EP1018213A2 (de) * 1998-04-09 2000-07-12 Koninklijke Philips Electronics N.V. Gekoppelter sägezahnoszillator
US6239591B1 (en) * 1999-04-29 2001-05-29 International Business Machines Corporation Method and apparatus for monitoring SOI hysterises effects
US6462623B1 (en) 1999-05-19 2002-10-08 Parthus Ireland Limited Method and apparatus for PLL with improved jitter performance
US6356132B1 (en) 2000-01-31 2002-03-12 Agere Systems Guardian Corp. Programmable delay cell
US6384654B1 (en) * 2000-10-17 2002-05-07 Glenn Noufer High speed circuit of particular utility in delay and phase locked loops
US6771105B2 (en) 2001-09-18 2004-08-03 Altera Corporation Voltage controlled oscillator programmable delay cells
JP3539947B2 (ja) * 2002-06-20 2004-07-07 沖電気工業株式会社 パワー検出回路付リミティングアンプ
US7049872B2 (en) * 2002-10-08 2006-05-23 Impinj, Inc. Use of analog-valued floating-gate transistors to match the electrical characteristics of interleaved and pipelined circuits
US7187237B1 (en) 2002-10-08 2007-03-06 Impinj, Inc. Use of analog-valued floating-gate transistors for parallel and serial signal processing
US7010376B2 (en) * 2002-10-25 2006-03-07 Pulp And Paper Research Institute Of Canada Diagnostic for poorly tuned control loops
US6774395B1 (en) 2003-01-15 2004-08-10 Advanced Micro Devices, Inc. Apparatus and methods for characterizing floating body effects in SOI devices
US6777708B1 (en) 2003-01-15 2004-08-17 Advanced Micro Devices, Inc. Apparatus and methods for determining floating body effects in SOI devices
US6954159B1 (en) 2003-07-01 2005-10-11 Impinj, Inc. Low distortion band-pass analog to digital converter with feed forward
US7019570B2 (en) * 2003-09-05 2006-03-28 Altera Corporation Dual-gain loop circuitry for programmable logic device
US6924678B2 (en) 2003-10-21 2005-08-02 Altera Corporation Programmable phase-locked loop circuitry for programmable logic device
US7075365B1 (en) 2004-04-22 2006-07-11 Altera Corporation Configurable clock network for programmable logic device
US7230495B2 (en) 2004-04-28 2007-06-12 Micron Technology, Inc. Phase-locked loop circuits with reduced lock time
WO2006102553A2 (en) * 2005-03-24 2006-09-28 Impinj, Inc. Error recovery in rfid reader systems
US7800455B2 (en) 2005-04-27 2010-09-21 Semiconductor Energy Laboratories Co., Ltd. PLL circuit and semiconductor device having the same
US7436228B1 (en) 2005-12-22 2008-10-14 Altera Corporation Variable-bandwidth loop filter methods and apparatus
US7728674B1 (en) 2006-05-19 2010-06-01 Altera Corporation Voltage-controlled oscillator methods and apparatus
KR100824790B1 (ko) * 2006-08-21 2008-04-24 삼성전자주식회사 클록 체배기 및 이를 포함하는 클록 생성기
US7629856B2 (en) * 2006-10-27 2009-12-08 Infineon Technologies Ag Delay stage, ring oscillator, PLL-circuit and method
CN101494449B (zh) * 2008-12-19 2011-02-02 清华大学深圳研究生院 一种激发式脉冲发生器
US8179120B2 (en) 2009-08-20 2012-05-15 International Business Machines Corporation Single level of metal test structure for differential timing and variability measurements of integrated circuits
US8378753B2 (en) 2010-05-07 2013-02-19 Macronix International Co., Ltd. Oscillator with frequency determined by relative magnitudes of current sources
US8395455B1 (en) * 2011-10-14 2013-03-12 United Microelectronics Corp. Ring oscillator
JP6063827B2 (ja) * 2013-06-25 2017-01-18 株式会社東芝 遅延回路および半導体記憶装置
KR102101836B1 (ko) * 2014-07-24 2020-04-17 삼성전자 주식회사 딜레이 셀 및 이를 적용하는 지연 동기 루프 회로와 위상 동기 루프 회로
US11349456B2 (en) * 2017-07-21 2022-05-31 Texas Instruments Incorporated Ultra-low energy per cycle oscillator topology

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2603627B2 (ja) * 1987-01-27 1997-04-23 松下電工株式会社 発振周波数可変のリングオシレータを用いた高周波磁気治療器
US5063311A (en) * 1990-06-04 1991-11-05 Motorola, Inc. Programmable time delay circuit for digital logic circuits
JP2990863B2 (ja) * 1991-06-26 1999-12-13 日本電気株式会社 発振回路
US5208557A (en) * 1992-02-18 1993-05-04 Texas Instruments Incorporated Multiple frequency ring oscillator
US5416446A (en) * 1992-12-08 1995-05-16 At&T Corp. Digital programmable frequency generator
DE69405442T2 (de) * 1993-03-18 1998-04-02 Hyundai Electronics America Übertragungsempfängerschaltkreis für eine integrierte Schaltung
GB9308944D0 (en) * 1993-04-30 1993-06-16 Inmos Ltd Ring oscillator
US5459437A (en) * 1994-05-10 1995-10-17 Integrated Device Technology Logic gate with controllable hysteresis and high frequency voltage controlled oscillator
US5491456A (en) 1994-12-08 1996-02-13 Texas Instruments Incorporated Oscillator compensated for improved frequency stability
EP0731560B1 (de) 1995-03-07 2003-05-28 STMicroelectronics S.r.l. Spannungsgesteuerter Oszillator mit breitem Frequenzbereich und mit geringem Zittern
US5621360A (en) * 1995-08-02 1997-04-15 Intel Corporation Voltage supply isolation buffer

Also Published As

Publication number Publication date
JPH1098357A (ja) 1998-04-14
FR2750268B1 (fr) 1998-07-31
US5952891A (en) 1999-09-14
EP0814562B1 (de) 2002-02-20
FR2750268A1 (fr) 1997-12-26
JP3469431B2 (ja) 2003-11-25
EP0814562A1 (de) 1997-12-29
USRE38274E1 (en) 2003-10-14
DE69710522T2 (de) 2002-08-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: BULL S.A., LES CLAYES SOUS BOIS, FR