DE69710230D1 - Non-volatile semiconductor memory unit with correction coding circuit - Google Patents

Non-volatile semiconductor memory unit with correction coding circuit

Info

Publication number
DE69710230D1
DE69710230D1 DE69710230T DE69710230T DE69710230D1 DE 69710230 D1 DE69710230 D1 DE 69710230D1 DE 69710230 T DE69710230 T DE 69710230T DE 69710230 T DE69710230 T DE 69710230T DE 69710230 D1 DE69710230 D1 DE 69710230D1
Authority
DE
Germany
Prior art keywords
data
error
prom
detection signal
specific
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69710230T
Other languages
German (de)
Other versions
DE69710230T2 (en
Inventor
Kunio Yoshinogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69710230D1 publication Critical patent/DE69710230D1/en
Publication of DE69710230T2 publication Critical patent/DE69710230T2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

A semiconductor storage unit includes: a first PROM; a second PROM for storing parity data based on data stored in the first PROM; an error detecting circuit for detecting an error in read data outputted from the first PROM on the basis of the parity data outputted from the second PROM to generate an error detection signal; an error correcting circuit for outputting the data read out from the first PROM as it is when no error detection signal is supplied thereto, and for outputting error corrected data when the error detection signal is supplied thereto; a specific-mode detecting circuit for generating a specific-mode detection signal when detecting a specific mode; and a different-data generating means for generating data different from data outputted from the error correcting circuit as output data when both of the error detection signal and the specific-mode detection signal are generated. <IMAGE>
DE69710230T 1996-02-28 1997-02-27 Non-volatile semiconductor memory unit with correction coding circuit Expired - Fee Related DE69710230T2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP08041042A JP3106947B2 (en) 1996-02-28 1996-02-28 Nonvolatile semiconductor memory device

Publications (2)

Publication Number Publication Date
DE69710230D1 true DE69710230D1 (en) 2002-03-21
DE69710230T2 DE69710230T2 (en) 2002-10-24

Family

ID=12597355

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69710230T Expired - Fee Related DE69710230T2 (en) 1996-02-28 1997-02-27 Non-volatile semiconductor memory unit with correction coding circuit

Country Status (4)

Country Link
US (1) US6052816A (en)
EP (1) EP0793173B1 (en)
JP (1) JP3106947B2 (en)
DE (1) DE69710230T2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100487632B1 (en) * 1997-10-11 2005-07-28 주식회사 하이닉스반도체 Inspection method of multiple faults of DRAM
US20030120858A1 (en) 2000-09-15 2003-06-26 Matrix Semiconductor, Inc. Memory devices and methods for use therewith
US6591394B2 (en) 2000-12-22 2003-07-08 Matrix Semiconductor, Inc. Three-dimensional memory array and method for storing data bits and ECC bits therein
US7051264B2 (en) * 2001-11-14 2006-05-23 Monolithic System Technology, Inc. Error correcting memory and method of operating same
US7237082B1 (en) * 2004-06-08 2007-06-26 Sun Microsystems, Inc. Spatially distributed parity protection
US7392456B2 (en) * 2004-11-23 2008-06-24 Mosys, Inc. Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memory
US8874958B2 (en) * 2010-11-09 2014-10-28 International Business Machines Corporation Error detection in a mirrored data storage system
CN102298112B (en) * 2011-05-05 2016-06-01 中兴通讯股份有限公司 The method of testing of a kind of PLD and system

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134988A (en) * 1984-12-04 1986-06-23 Toshiba Corp Error detecting/correction function controlling system of dynamic type memory
US4726021A (en) * 1985-04-17 1988-02-16 Hitachi, Ltd. Semiconductor memory having error correcting means
DE3685078D1 (en) * 1985-09-09 1992-06-04 Hitachi Ltd MEMORY TEST DEVICE.
US4710934A (en) * 1985-11-08 1987-12-01 Texas Instruments Incorporated Random access memory with error correction capability
JP2527935B2 (en) * 1986-05-19 1996-08-28 株式会社 アドバンテスト Semiconductor memory test equipment
US4872168A (en) * 1986-10-02 1989-10-03 American Telephone And Telegraph Company, At&T Bell Laboratories Integrated circuit with memory self-test
US4761783A (en) * 1986-10-17 1988-08-02 Christensen Harold F Apparatus and method for reporting occurrences of errors in signals stored in a data processor
JP2613411B2 (en) * 1987-12-29 1997-05-28 株式会社アドバンテスト Memory test equipment
JPH01184700A (en) * 1988-01-11 1989-07-24 Advantest Corp Memory test equipment
JP2821278B2 (en) * 1991-04-15 1998-11-05 日本電気アイシーマイコンシステム株式会社 Semiconductor integrated circuit
JP2745252B2 (en) * 1991-06-24 1998-04-28 三菱電機株式会社 Semiconductor storage device
US5455517A (en) * 1992-06-09 1995-10-03 International Business Machines Corporation Data output impedance control
JPH06275098A (en) * 1993-03-24 1994-09-30 Mitsubishi Electric Corp Semiconductor memory
JP2801495B2 (en) * 1993-04-07 1998-09-21 シャープ株式会社 Optical recording / reproducing device

Also Published As

Publication number Publication date
JP3106947B2 (en) 2000-11-06
EP0793173B1 (en) 2002-02-06
EP0793173A3 (en) 1998-03-25
JPH09231785A (en) 1997-09-05
US6052816A (en) 2000-04-18
DE69710230T2 (en) 2002-10-24
EP0793173A2 (en) 1997-09-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee