DE69636701D1 - Verfahren und Vorrichtung zur Prüfung von Halbleiterchips - Google Patents
Verfahren und Vorrichtung zur Prüfung von HalbleiterchipsInfo
- Publication number
- DE69636701D1 DE69636701D1 DE69636701T DE69636701T DE69636701D1 DE 69636701 D1 DE69636701 D1 DE 69636701D1 DE 69636701 T DE69636701 T DE 69636701T DE 69636701 T DE69636701 T DE 69636701T DE 69636701 D1 DE69636701 D1 DE 69636701D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor chips
- testing semiconductor
- testing
- chips
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- G—PHYSICS
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- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07314—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0367—Metallic bump or raised conductor not used as solder bump
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09481—Via in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0067—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto an inorganic, non-metallic substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- General Engineering & Computer Science (AREA)
- Geometry (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US432111 | 1989-11-06 | ||
US08/432,111 US5578934A (en) | 1991-06-04 | 1995-05-01 | Method and apparatus for testing unpackaged semiconductor dice |
PCT/US1996/006002 WO1996035129A1 (en) | 1995-05-01 | 1996-04-30 | Method and apparatus for testing semiconductor dice |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69636701D1 true DE69636701D1 (de) | 2006-12-28 |
DE69636701T2 DE69636701T2 (de) | 2007-09-13 |
Family
ID=23714820
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69636701T Expired - Lifetime DE69636701T2 (de) | 1995-05-01 | 1996-04-30 | Verfahren und Vorrichtung zur Prüfung von Halbleiterchips |
Country Status (6)
Country | Link |
---|---|
US (2) | US5578934A (de) |
EP (2) | EP0826152B1 (de) |
JP (1) | JP3401014B2 (de) |
KR (1) | KR100390595B1 (de) |
DE (1) | DE69636701T2 (de) |
WO (1) | WO1996035129A1 (de) |
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-
1995
- 1995-05-01 US US08/432,111 patent/US5578934A/en not_active Expired - Lifetime
-
1996
- 1996-04-30 WO PCT/US1996/006002 patent/WO1996035129A1/en active IP Right Grant
- 1996-04-30 EP EP96915407A patent/EP0826152B1/de not_active Expired - Lifetime
- 1996-04-30 EP EP06075592A patent/EP1691206A3/de not_active Withdrawn
- 1996-04-30 KR KR1019970707732A patent/KR100390595B1/ko not_active IP Right Cessation
- 1996-04-30 JP JP53342396A patent/JP3401014B2/ja not_active Expired - Fee Related
- 1996-04-30 DE DE69636701T patent/DE69636701T2/de not_active Expired - Lifetime
- 1996-05-31 US US08/657,854 patent/US5949242A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1691206A2 (de) | 2006-08-16 |
EP0826152A4 (de) | 1998-12-23 |
KR100390595B1 (ko) | 2003-10-04 |
DE69636701T2 (de) | 2007-09-13 |
WO1996035129A1 (en) | 1996-11-07 |
US5949242A (en) | 1999-09-07 |
EP0826152B1 (de) | 2006-11-15 |
EP0826152A1 (de) | 1998-03-04 |
EP1691206A3 (de) | 2006-08-30 |
JPH11504712A (ja) | 1999-04-27 |
US5578934A (en) | 1996-11-26 |
JP3401014B2 (ja) | 2003-04-28 |
KR19990008207A (ko) | 1999-01-25 |
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