DE69900351T2 - Prüfkopfanordnung - Google Patents

Prüfkopfanordnung

Info

Publication number
DE69900351T2
DE69900351T2 DE69900351T DE69900351T DE69900351T2 DE 69900351 T2 DE69900351 T2 DE 69900351T2 DE 69900351 T DE69900351 T DE 69900351T DE 69900351 T DE69900351 T DE 69900351T DE 69900351 T2 DE69900351 T2 DE 69900351T2
Authority
DE
Germany
Prior art keywords
probe arrangement
probe
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69900351T
Other languages
English (en)
Other versions
DE69900351D1 (de
Inventor
Peter Hirschmann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Verigy Singapore Pte Ltd
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of DE69900351D1 publication Critical patent/DE69900351D1/de
Application granted granted Critical
Publication of DE69900351T2 publication Critical patent/DE69900351T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
DE69900351T 1999-03-19 1999-03-19 Prüfkopfanordnung Expired - Fee Related DE69900351T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP99105625A EP0965845B1 (de) 1999-03-19 1999-03-19 Prüfkopfanordnung

Publications (2)

Publication Number Publication Date
DE69900351D1 DE69900351D1 (de) 2001-11-22
DE69900351T2 true DE69900351T2 (de) 2002-10-17

Family

ID=8237810

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69900351T Expired - Fee Related DE69900351T2 (de) 1999-03-19 1999-03-19 Prüfkopfanordnung

Country Status (4)

Country Link
US (1) US6507203B1 (de)
EP (1) EP0965845B1 (de)
JP (1) JP2000292486A (de)
DE (1) DE69900351T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10159165B4 (de) 2001-12-03 2007-02-08 Agilent Technologies, Inc. (n.d.Ges.d.Staates Delaware), Palo Alto Vorrichtung zum Messen und/oder Kalibrieren eines Testkopfes
US6836110B1 (en) * 2003-04-29 2004-12-28 National Semiconductor Corporation Universal tester to handler docking plate
JP2006292727A (ja) * 2005-03-18 2006-10-26 Alps Electric Co Ltd 半導体搬送トレイ、これを用いたバーンインボード、バーンイン試験用の検査装置及びバーンイン試験方法並びに半導体の製造方法
US7680619B1 (en) * 2005-05-31 2010-03-16 Keithley Instruments, Inc. Parallel test architecture
US7274202B2 (en) * 2005-10-07 2007-09-25 Verigy (Singapore) Pte. Ltd. Carousel device, system and method for electronic circuit tester
DE102005057508B4 (de) * 2005-12-01 2011-11-17 Multitest Elektronische Systeme Gmbh Dockingvorrichtung zum Kuppeln einer Handhabungsvorrichtung mit einem Testkopf für elektronische Bauelemente
US7420385B2 (en) * 2005-12-05 2008-09-02 Verigy (Singapore) Pte. Ltd. System-on-a-chip pipeline tester and method
US7688077B2 (en) * 2007-08-23 2010-03-30 Advantest Corporation Test system and daughter unit
JP2011242338A (ja) * 2010-05-20 2011-12-01 Advantest Corp 試験装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2559004C2 (de) * 1975-12-29 1978-09-28 Ibm Deutschland Gmbh, 7000 Stuttgart Anordnung zur Prüfung von elektrischen Prüflingen mit einer Vielzahl von Prüfkontakten
US4145620A (en) * 1977-10-05 1979-03-20 Serel Corporation Modular dynamic burn-in apparatus
US4746861A (en) * 1986-08-21 1988-05-24 Tti Testron, Inc. Test fixture for printed circuit board assembly
US5012187A (en) * 1989-11-03 1991-04-30 Motorola, Inc. Method for parallel testing of semiconductor devices
KR930702085A (ko) * 1990-09-24 1993-09-08 레이몬드 지. 트위그 전자장치 테스트 처리기
JPH04216642A (ja) * 1990-12-17 1992-08-06 Fujitsu Ltd 半導体パッケージ用キャリア及び半導体パッケージの測定方法
US5578934A (en) * 1991-06-04 1996-11-26 Micron Technology, Inc. Method and apparatus for testing unpackaged semiconductor dice
JPH05333095A (ja) * 1992-05-28 1993-12-17 Rohm Co Ltd 電子部品の測定装置
US5489852A (en) * 1992-11-06 1996-02-06 Advanced Micro Devices, Inc. System for interfacing wafer sort prober apparatus and packaged IC handler apparatus to a common test computer
JP2899543B2 (ja) * 1995-06-08 1999-06-02 信越ポリマー株式会社 半導体パッケージ接続用ソケット
DE19627801C1 (de) * 1996-07-10 1998-03-26 Atg Test Systems Gmbh Vorrichtung zum Prüfen von elektrischen Leiterplatten
US5828223A (en) * 1996-10-28 1998-10-27 Rabkin; Richard Universal chip tester interface device
US6072326A (en) * 1997-08-22 2000-06-06 Micron Technology, Inc. System for testing semiconductor components

Also Published As

Publication number Publication date
JP2000292486A (ja) 2000-10-20
US6507203B1 (en) 2003-01-14
EP0965845B1 (de) 2001-10-17
EP0965845A1 (de) 1999-12-22
DE69900351D1 (de) 2001-11-22

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Legal Events

Date Code Title Description
8332 No legal effect for de
8370 Indication related to discontinuation of the patent is to be deleted
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER & ZINKLER, 82049 PU

8327 Change in the person/name/address of the patent owner

Owner name: VERIGY (SINGAPORE) PTE. LTD., SINGAPORE, SG

8339 Ceased/non-payment of the annual fee