DE69628222D1 - Verfahren und Vorrichtung zur digitalen Signalverarbeitung - Google Patents

Verfahren und Vorrichtung zur digitalen Signalverarbeitung

Info

Publication number
DE69628222D1
DE69628222D1 DE69628222T DE69628222T DE69628222D1 DE 69628222 D1 DE69628222 D1 DE 69628222D1 DE 69628222 T DE69628222 T DE 69628222T DE 69628222 T DE69628222 T DE 69628222T DE 69628222 D1 DE69628222 D1 DE 69628222D1
Authority
DE
Germany
Prior art keywords
signal processing
digital signal
digital
processing
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69628222T
Other languages
English (en)
Other versions
DE69628222T2 (de
Inventor
Yuji Yaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69628222D1 publication Critical patent/DE69628222D1/de
Application granted granted Critical
Publication of DE69628222T2 publication Critical patent/DE69628222T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/28—Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1087—Data input latches
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8015—One dimensional arrays, e.g. rings, linear arrays, buses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
DE69628222T 1995-01-19 1996-01-16 Verfahren und Vorrichtung zur digitalen Signalverarbeitung Expired - Lifetime DE69628222T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2474895 1995-01-19
JP7024748A JPH08194679A (ja) 1995-01-19 1995-01-19 ディジタル信号処理方法及び装置並びにメモリセル読出し方法

Publications (2)

Publication Number Publication Date
DE69628222D1 true DE69628222D1 (de) 2003-06-26
DE69628222T2 DE69628222T2 (de) 2004-04-01

Family

ID=12146772

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69628222T Expired - Lifetime DE69628222T2 (de) 1995-01-19 1996-01-16 Verfahren und Vorrichtung zur digitalen Signalverarbeitung

Country Status (6)

Country Link
US (1) US5860084A (de)
EP (1) EP0733981B1 (de)
JP (1) JPH08194679A (de)
KR (1) KR960029967A (de)
DE (1) DE69628222T2 (de)
TW (1) TW302456B (de)

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US6903964B2 (en) * 2002-06-28 2005-06-07 Freescale Semiconductor, Inc. MRAM architecture with electrically isolated read and write circuitry
JP4170952B2 (ja) 2004-01-30 2008-10-22 株式会社東芝 半導体記憶装置
JP2007012869A (ja) 2005-06-30 2007-01-18 Seiko Epson Corp 集積回路装置及び電子機器
JP4010333B2 (ja) * 2005-06-30 2007-11-21 セイコーエプソン株式会社 集積回路装置及び電子機器
KR100828792B1 (ko) * 2005-06-30 2008-05-09 세이코 엡슨 가부시키가이샤 집적 회로 장치 및 전자 기기
JP4552776B2 (ja) * 2005-06-30 2010-09-29 セイコーエプソン株式会社 集積回路装置及び電子機器
US7593270B2 (en) 2005-06-30 2009-09-22 Seiko Epson Corporation Integrated circuit device and electronic instrument
US20070001970A1 (en) * 2005-06-30 2007-01-04 Seiko Epson Corporation Integrated circuit device and electronic instrument
US20070001984A1 (en) * 2005-06-30 2007-01-04 Seiko Epson Corporation Integrated circuit device and electronic instrument
US7561478B2 (en) * 2005-06-30 2009-07-14 Seiko Epson Corporation Integrated circuit device and electronic instrument
JP4151688B2 (ja) * 2005-06-30 2008-09-17 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4158788B2 (ja) * 2005-06-30 2008-10-01 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4345725B2 (ja) * 2005-06-30 2009-10-14 セイコーエプソン株式会社 表示装置及び電子機器
JP4010332B2 (ja) * 2005-06-30 2007-11-21 セイコーエプソン株式会社 集積回路装置及び電子機器
US7564734B2 (en) 2005-06-30 2009-07-21 Seiko Epson Corporation Integrated circuit device and electronic instrument
JP4830371B2 (ja) * 2005-06-30 2011-12-07 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4010335B2 (ja) * 2005-06-30 2007-11-21 セイコーエプソン株式会社 集積回路装置及び電子機器
JP2007012925A (ja) * 2005-06-30 2007-01-18 Seiko Epson Corp 集積回路装置及び電子機器
JP4661400B2 (ja) * 2005-06-30 2011-03-30 セイコーエプソン株式会社 集積回路装置及び電子機器
US7755587B2 (en) * 2005-06-30 2010-07-13 Seiko Epson Corporation Integrated circuit device and electronic instrument
JP4661401B2 (ja) * 2005-06-30 2011-03-30 セイコーエプソン株式会社 集積回路装置及び電子機器
KR100826695B1 (ko) 2005-06-30 2008-04-30 세이코 엡슨 가부시키가이샤 집적 회로 장치 및 전자 기기
US7764278B2 (en) 2005-06-30 2010-07-27 Seiko Epson Corporation Integrated circuit device and electronic instrument
KR100850614B1 (ko) * 2005-06-30 2008-08-05 세이코 엡슨 가부시키가이샤 집적 회로 장치 및 전자 기기
JP4010334B2 (ja) * 2005-06-30 2007-11-21 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4186970B2 (ja) * 2005-06-30 2008-11-26 セイコーエプソン株式会社 集積回路装置及び電子機器
US7567479B2 (en) * 2005-06-30 2009-07-28 Seiko Epson Corporation Integrated circuit device and electronic instrument
US20070016700A1 (en) * 2005-06-30 2007-01-18 Seiko Epson Corporation Integrated circuit device and electronic instrument
JP4010336B2 (ja) 2005-06-30 2007-11-21 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4665677B2 (ja) 2005-09-09 2011-04-06 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4586739B2 (ja) * 2006-02-10 2010-11-24 セイコーエプソン株式会社 半導体集積回路及び電子機器
US20180005346A1 (en) * 2016-07-01 2018-01-04 Google Inc. Core Processes For Block Operations On An Image Processor Having A Two-Dimensional Execution Lane Array and A Two-Dimensional Shift Register
US20180007302A1 (en) 2016-07-01 2018-01-04 Google Inc. Block Operations For An Image Processor Having A Two-Dimensional Execution Lane Array and A Two-Dimensional Shift Register

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JPH0740252B2 (ja) * 1986-03-08 1995-05-01 株式会社日立製作所 マルチプロセツサシステム
US4982363A (en) * 1988-12-05 1991-01-01 Motorola, Inc. Sensing structure for single ended input
JPH0630094B2 (ja) * 1989-03-13 1994-04-20 インターナショナル・ビジネス・マシーンズ・コーポレイション マルチプロセツサ・システム
KR100224054B1 (ko) * 1989-10-13 1999-10-15 윌리엄 비. 켐플러 동기 벡터 프로세서내의 비디오신호를 연속 프로세싱 하기 위한 회로 및 이의 작동 방법
US5163120A (en) * 1989-10-13 1992-11-10 Texas Instruments Incorporated Second nearest-neighbor communication network for synchronous vector processor, systems and methods
US5093722A (en) * 1990-03-01 1992-03-03 Texas Instruments Incorporated Definition television digital processing units, systems and methods
EP0463721A3 (en) * 1990-04-30 1993-06-16 Gennum Corporation Digital signal processing device
JP2535252B2 (ja) * 1990-10-17 1996-09-18 三菱電機株式会社 並列処理装置
JPH04238197A (ja) * 1991-01-22 1992-08-26 Nec Corp センスアンプ回路
KR950004853B1 (ko) * 1991-08-14 1995-05-15 삼성전자 주식회사 저전력용 블럭 선택 기능을 가지는 반도체 메모리 장치
JPH064689A (ja) * 1992-06-17 1994-01-14 Sony Corp リニアアレイ型の並列ｄｓｐプロセッサ
US5448716A (en) * 1992-10-30 1995-09-05 International Business Machines Corporation Apparatus and method for booting a multiple processor system having a global/local memory architecture
JPH06215564A (ja) * 1993-01-13 1994-08-05 Nec Corp 半導体記憶装置
KR0140673B1 (ko) * 1993-01-27 1998-06-01 모리시다 요이찌 반도체 메모리
JP2823466B2 (ja) * 1993-01-28 1998-11-11 株式会社東芝 半導体記憶装置
JPH06318156A (ja) * 1993-05-07 1994-11-15 Hitachi Ltd サービスプロセッサ制御方式
JP3191549B2 (ja) * 1994-02-15 2001-07-23 松下電器産業株式会社 半導体メモリ装置
US5532965A (en) * 1995-04-13 1996-07-02 Kenney; Donald M. Memory precharge scheme using spare column

Also Published As

Publication number Publication date
KR960029967A (ko) 1996-08-17
US5860084A (en) 1999-01-12
EP0733981A2 (de) 1996-09-25
JPH08194679A (ja) 1996-07-30
EP0733981A3 (de) 1998-09-16
DE69628222T2 (de) 2004-04-01
EP0733981B1 (de) 2003-05-21
TW302456B (de) 1997-04-11

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