DE69615987T2 - Integrierte Schaltung mit programmierbarer Bus-Konfiguration - Google Patents

Integrierte Schaltung mit programmierbarer Bus-Konfiguration

Info

Publication number
DE69615987T2
DE69615987T2 DE69615987T DE69615987T DE69615987T2 DE 69615987 T2 DE69615987 T2 DE 69615987T2 DE 69615987 T DE69615987 T DE 69615987T DE 69615987 T DE69615987 T DE 69615987T DE 69615987 T2 DE69615987 T2 DE 69615987T2
Authority
DE
Germany
Prior art keywords
integrated circuit
bus configuration
programmable bus
programmable
configuration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69615987T
Other languages
English (en)
Other versions
DE69615987D1 (de
Inventor
Michael Richard Betker
Trevor Edward Little
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Application granted granted Critical
Publication of DE69615987D1 publication Critical patent/DE69615987D1/de
Publication of DE69615987T2 publication Critical patent/DE69615987T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Microcomputers (AREA)
  • Information Transfer Systems (AREA)
DE69615987T 1995-11-20 1996-11-12 Integrierte Schaltung mit programmierbarer Bus-Konfiguration Expired - Fee Related DE69615987T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/559,868 US5909557A (en) 1995-11-20 1995-11-20 Integrated circuit with programmable bus configuration

Publications (2)

Publication Number Publication Date
DE69615987D1 DE69615987D1 (de) 2001-11-22
DE69615987T2 true DE69615987T2 (de) 2002-04-25

Family

ID=24235386

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69615987T Expired - Fee Related DE69615987T2 (de) 1995-11-20 1996-11-12 Integrierte Schaltung mit programmierbarer Bus-Konfiguration

Country Status (4)

Country Link
US (1) US5909557A (de)
EP (1) EP0774713B1 (de)
JP (1) JP3811231B2 (de)
DE (1) DE69615987T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10394291B4 (de) * 2003-08-29 2012-10-11 Lantiq Deutschland Gmbh Datenschalter und Kommunikationssystem, das diesen Datenschalter verwendet

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JPH10326224A (ja) * 1997-05-27 1998-12-08 Nec Corp ディジタル・シグナル・プロセッサ
US6624761B2 (en) 1998-12-11 2003-09-23 Realtime Data, Llc Content independent data compression method and system
US6233632B1 (en) * 1999-01-07 2001-05-15 Vlsi Technology, Inc. Optimizing peripheral component interconnect transactions in a mixed 32/64-bit environment by eliminating unnecessary data transfers
US6601104B1 (en) 1999-03-11 2003-07-29 Realtime Data Llc System and methods for accelerated data storage and retrieval
US6604158B1 (en) 1999-03-11 2003-08-05 Realtime Data, Llc System and methods for accelerated data storage and retrieval
DE19952034A1 (de) * 1999-10-28 2001-05-10 Infineon Technologies Ag Verfahren zum Initialisieren oder Konfigurieren einer elektrischen Schaltung
US6625727B1 (en) * 1999-11-23 2003-09-23 Motorola, Inc. Apparatus and method for configuring a data processing system by retrieving a configuration value from storage device using reset vector and configuring parameters after reset
US7181608B2 (en) 2000-02-03 2007-02-20 Realtime Data Llc Systems and methods for accelerated loading of operating systems and application programs
US8692695B2 (en) 2000-10-03 2014-04-08 Realtime Data, Llc Methods for encoding and decoding data
US7417568B2 (en) 2000-10-03 2008-08-26 Realtime Data Llc System and method for data feed acceleration and encryption
US9143546B2 (en) 2000-10-03 2015-09-22 Realtime Data Llc System and method for data feed acceleration and encryption
US7386046B2 (en) 2001-02-13 2008-06-10 Realtime Data Llc Bandwidth sensitive data compression and decompression
GB0105609D0 (en) * 2001-03-07 2001-04-25 Nec Technologies Uk Ltd Configuration of features of a digital processing device
US6845444B2 (en) * 2001-08-23 2005-01-18 Silicon Integrated Systems Corp. Method and apparatus for reducing strapping devices
US20030097510A1 (en) * 2001-11-20 2003-05-22 Francis Joseph System-On-Chip architecture that utilizes FeRAM and re-configurable hardware
KR100466980B1 (ko) * 2002-01-15 2005-01-24 삼성전자주식회사 낸드 플래시 메모리 장치
KR100468761B1 (ko) * 2002-08-23 2005-01-29 삼성전자주식회사 분할된 시스템 데이터 버스에 연결되는 메모리 모듈을구비하는 반도체 메모리 시스템
US7366872B2 (en) * 2003-12-30 2008-04-29 Intel Corporation Method for addressing configuration registers by scanning for a structure in configuration space and adding a known offset
JP2008508588A (ja) * 2004-07-30 2008-03-21 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 様々な外部メモリサイズとエンディアンネスに対して適応できるデータ処理装置
US8832341B2 (en) 2011-09-27 2014-09-09 International Business Machines Corporation Dynamically determining a primary or slave assignment based on receiving a power signal from the cable at the port of a device

Family Cites Families (14)

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Publication number Priority date Publication date Assignee Title
US4272829A (en) * 1977-12-29 1981-06-09 Ncr Corporation Reconfigurable register and logic circuitry device for selective connection to external buses
US4519028A (en) * 1981-02-17 1985-05-21 Digital Equipment Corporation CPU with multi-stage mode register for defining CPU operating environment including charging its communications protocol
US4940909A (en) * 1989-05-12 1990-07-10 Plus Logic, Inc. Configuration control circuit for programmable logic devices
US5361365A (en) * 1989-11-06 1994-11-01 Sharp Kabushiki Kaisha Microprocessor for selectively performing cold and warm starts
US5175831A (en) * 1989-12-05 1992-12-29 Zilog, Inc. System register initialization technique employing a non-volatile/read only memory
EP0433818B1 (de) * 1989-12-19 1998-11-11 3Com Corporation Konfigurationsverfahren für eine Rechnerbus-Adapterkarte ohne Brücken oder Schalter
JPH03204016A (ja) * 1989-12-29 1991-09-05 Nippon Steel Corp カード型ｉｃ実装ボード
US5671355A (en) * 1992-06-26 1997-09-23 Predacomm, Inc. Reconfigurable network interface apparatus and method
US5428748A (en) * 1992-09-24 1995-06-27 National Semiconductor Corporation Method and apparatus for automatically configuring a computer peripheral
EP0619546A1 (de) * 1993-04-05 1994-10-12 Motorola, Inc. Programmierbare Speichersteuerungsvorrichtung und Verfahren zu ihren Konfigurierung
US5414380A (en) * 1993-04-19 1995-05-09 Motorola, Inc. Integrated circuit with an active-level configurable and method therefor
JPH0736858A (ja) * 1993-07-21 1995-02-07 Hitachi Ltd 信号処理プロセッサ
US5594874A (en) * 1993-09-30 1997-01-14 Cirrus Logic, Inc. Automatic bus setting, sensing and switching interface unit
US5623687A (en) * 1995-06-26 1997-04-22 Motorola Reset configuration in a data processing system and method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10394291B4 (de) * 2003-08-29 2012-10-11 Lantiq Deutschland Gmbh Datenschalter und Kommunikationssystem, das diesen Datenschalter verwendet

Also Published As

Publication number Publication date
EP0774713B1 (de) 2001-10-17
US5909557A (en) 1999-06-01
JPH09153025A (ja) 1997-06-10
EP0774713A1 (de) 1997-05-21
DE69615987D1 (de) 2001-11-22
JP3811231B2 (ja) 2006-08-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee