DE69605717T2 - Schaltungsanordnung zum Liefern einer kompensierten Polarisationsspannung für P-Kanal-Transistoren - Google Patents
Schaltungsanordnung zum Liefern einer kompensierten Polarisationsspannung für P-Kanal-TransistorenInfo
- Publication number
- DE69605717T2 DE69605717T2 DE69605717T DE69605717T DE69605717T2 DE 69605717 T2 DE69605717 T2 DE 69605717T2 DE 69605717 T DE69605717 T DE 69605717T DE 69605717 T DE69605717 T DE 69605717T DE 69605717 T2 DE69605717 T2 DE 69605717T2
- Authority
- DE
- Germany
- Prior art keywords
- supplying
- circuit arrangement
- channel transistors
- polarization voltage
- compensated polarization
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/205—Substrate bias-voltage generators
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Logic Circuits (AREA)
- Amplifiers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/464,551 US5640122A (en) | 1994-12-16 | 1995-06-05 | Circuit for providing a bias voltage compensated for p-channel transistor variations |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69605717D1 DE69605717D1 (de) | 2000-01-27 |
DE69605717T2 true DE69605717T2 (de) | 2000-06-15 |
Family
ID=23844382
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69605717T Expired - Fee Related DE69605717T2 (de) | 1995-06-05 | 1996-05-08 | Schaltungsanordnung zum Liefern einer kompensierten Polarisationsspannung für P-Kanal-Transistoren |
Country Status (3)
Country | Link |
---|---|
US (1) | US5640122A (de) |
EP (1) | EP0747800B1 (de) |
DE (1) | DE69605717T2 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004004775A1 (de) * | 2004-01-30 | 2005-08-25 | Infineon Technologies Ag | Spannungsregelsystem |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR0142960B1 (ko) * | 1995-05-25 | 1998-08-17 | 김광호 | 전원 변동에 안정된 반도체 메모리 장치 |
JP2917877B2 (ja) * | 1995-10-11 | 1999-07-12 | 日本電気株式会社 | 基準電流発生回路 |
US5982225A (en) * | 1997-08-06 | 1999-11-09 | International Business Machines Corporation | Hot electron compensation for improved MOS transistor reliability |
FR2778514A1 (fr) * | 1998-05-05 | 1999-11-12 | Sgs Thomson Microelectronics | Oscillateur capacitif independant de la temperature |
US5959446A (en) * | 1998-07-17 | 1999-09-28 | National Semiconductor Corporation | High swing current efficient CMOS cascode current mirror |
US6259302B1 (en) * | 1998-10-22 | 2001-07-10 | National Semiconductor Corporation | Gain control signal generator that tracks operating variations due to variations in manufacturing processes and operating conditions by tracking variations in DC biasing |
US6177817B1 (en) | 1999-04-01 | 2001-01-23 | International Business Machines Corporation | Compensated-current mirror off-chip driver |
US6300798B1 (en) * | 1999-10-15 | 2001-10-09 | Intel Corporation | Method and apparatus for controlling compensated buffers |
US6437622B1 (en) * | 2001-03-27 | 2002-08-20 | Texas Instruments Incorporated | Temperature compensated slew rate control circuit |
US7092692B2 (en) * | 2003-03-31 | 2006-08-15 | Agency For Science, Technology And Research | Threshold voltage (Vth), power supply (VDD), and temperature compensation bias circuit for CMOS passive mixer |
US7061304B2 (en) * | 2004-01-28 | 2006-06-13 | International Business Machines Corporation | Fuse latch with compensated programmable resistive trip point |
US7012467B2 (en) * | 2004-03-10 | 2006-03-14 | Texas Instruments Incorporated | Apparatus and method for compensating operating current in an amplifier when supply voltage varies |
DE102004021232A1 (de) * | 2004-04-30 | 2005-11-17 | Austriamicrosystems Ag | Stromspiegelanordnung |
DE102004049194B3 (de) * | 2004-10-08 | 2006-02-02 | Infineon Technologies Ag | Vorstufe für einen externen Treiber (OCD) |
US8054111B2 (en) * | 2004-12-13 | 2011-11-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and electronic appliance using the same |
US7259614B1 (en) * | 2005-03-30 | 2007-08-21 | Integrated Device Technology, Inc. | Voltage sensing circuit |
KR100790492B1 (ko) * | 2005-07-01 | 2008-01-02 | 삼성전자주식회사 | 슬루 레이트를 제어하는 소스 드라이버 및 그것의 구동방법 |
US7570088B1 (en) * | 2005-12-01 | 2009-08-04 | Nvidia Corporation | Input/output buffer for wide supply voltage range |
US7902885B2 (en) * | 2006-12-28 | 2011-03-08 | Stmicroelectronics Pvt. Ltd. | Compensated output buffer for improving slew control rate |
US7915950B2 (en) * | 2008-06-20 | 2011-03-29 | Conexant Systems, Inc. | Method and algorithm of high precision on-chip global biasing using integrated resistor calibration circuits |
US20100315124A1 (en) * | 2009-06-15 | 2010-12-16 | Berkeley Law & Technology Group, Llp | Low power receiver circuit |
CN102024410B (zh) | 2009-09-16 | 2014-10-22 | 株式会社半导体能源研究所 | 半导体装置及电子设备 |
JP6116149B2 (ja) | 2011-08-24 | 2017-04-19 | 株式会社半導体エネルギー研究所 | 半導体装置 |
US8786355B2 (en) | 2011-11-10 | 2014-07-22 | Qualcomm Incorporated | Low-power voltage reference circuit |
TWI580189B (zh) | 2011-12-23 | 2017-04-21 | 半導體能源研究所股份有限公司 | 位準位移電路及半導體積體電路 |
US9817426B2 (en) * | 2014-11-05 | 2017-11-14 | Nxp B.V. | Low quiescent current voltage regulator with high load-current capability |
US20170023967A1 (en) * | 2015-07-08 | 2017-01-26 | Anaprime Llc | Voltage reference compensation |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS514019Y1 (de) * | 1970-11-21 | 1976-02-04 | ||
JP2592234B2 (ja) * | 1985-08-16 | 1997-03-19 | 富士通株式会社 | 半導体装置 |
FR2588431B1 (fr) * | 1985-10-08 | 1987-11-20 | Radiotechnique | Circuit regulateur de tension |
KR910001293B1 (ko) * | 1986-03-31 | 1991-02-28 | 가부시키가이샤 도시바 | 전원전압검출회로 |
JP3288727B2 (ja) * | 1991-05-24 | 2002-06-04 | 株式会社東芝 | 出力回路 |
CA2066929C (en) * | 1991-08-09 | 1996-10-01 | Katsuji Kimura | Temperature sensor circuit and constant-current circuit |
US5394026A (en) * | 1993-02-02 | 1995-02-28 | Motorola Inc. | Substrate bias generating circuit |
-
1995
- 1995-06-05 US US08/464,551 patent/US5640122A/en not_active Expired - Lifetime
-
1996
- 1996-05-08 EP EP96303214A patent/EP0747800B1/de not_active Expired - Lifetime
- 1996-05-08 DE DE69605717T patent/DE69605717T2/de not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004004775A1 (de) * | 2004-01-30 | 2005-08-25 | Infineon Technologies Ag | Spannungsregelsystem |
DE102004004775B4 (de) * | 2004-01-30 | 2006-11-23 | Infineon Technologies Ag | Spannungsregelsystem |
US7312652B2 (en) | 2004-01-30 | 2007-12-25 | Infineon Technologies Ag | Voltage regulation system |
Also Published As
Publication number | Publication date |
---|---|
EP0747800A1 (de) | 1996-12-11 |
DE69605717D1 (de) | 2000-01-27 |
EP0747800B1 (de) | 1999-12-22 |
US5640122A (en) | 1997-06-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |