DE69604297D1 - Segmentierte leseleitungsschaltung insbesondere für multiport speicheranordnungen - Google Patents

Segmentierte leseleitungsschaltung insbesondere für multiport speicheranordnungen

Info

Publication number
DE69604297D1
DE69604297D1 DE69604297T DE69604297T DE69604297D1 DE 69604297 D1 DE69604297 D1 DE 69604297D1 DE 69604297 T DE69604297 T DE 69604297T DE 69604297 T DE69604297 T DE 69604297T DE 69604297 D1 DE69604297 D1 DE 69604297D1
Authority
DE
Germany
Prior art keywords
line circuit
reading line
storage arrangements
multiport storage
segmented reading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69604297T
Other languages
English (en)
Other versions
DE69604297T2 (de
Inventor
Brian Mcminn
R Calvin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE69604297D1 publication Critical patent/DE69604297D1/de
Application granted granted Critical
Publication of DE69604297T2 publication Critical patent/DE69604297T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
DE69604297T 1995-09-07 1996-07-11 Segmentierte leseleitungsschaltung insbesondere für multiport speicheranordnungen Expired - Lifetime DE69604297T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/525,431 US5646893A (en) 1995-09-07 1995-09-07 Segmented read line circuit particularly useful for multi-port storage arrays
PCT/US1996/011527 WO1997009719A1 (en) 1995-09-07 1996-07-11 Segmented read line circuit particularly useful for multi-port storage arrays

Publications (2)

Publication Number Publication Date
DE69604297D1 true DE69604297D1 (de) 1999-10-21
DE69604297T2 DE69604297T2 (de) 2000-05-11

Family

ID=24093229

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69604297T Expired - Lifetime DE69604297T2 (de) 1995-09-07 1996-07-11 Segmentierte leseleitungsschaltung insbesondere für multiport speicheranordnungen

Country Status (4)

Country Link
US (1) US5646893A (de)
EP (1) EP0848851B1 (de)
DE (1) DE69604297T2 (de)
WO (1) WO1997009719A1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5828623A (en) * 1996-02-23 1998-10-27 Integrated Device Technology, Inc. Parallel write logic for multi-port memory arrays
US5831896A (en) * 1996-12-17 1998-11-03 International Business Machines Corporation Memory cell
US6188596B1 (en) 1999-05-20 2001-02-13 Advanced Micro Devices, Inc. Layout for semiconductor memory including multi-level sensing
US6258642B1 (en) * 1999-05-20 2001-07-10 Advanced Micro Devices, Inc. Use of functional memory cells as guard cells in a semiconductor memory
US6278627B1 (en) * 2000-02-15 2001-08-21 Intel Corporation Multiple input bit-line detection with phase stealing latch in a memory design
US6625081B2 (en) * 2001-08-13 2003-09-23 Micron Technology, Inc. Synchronous flash memory with virtual segment architecture
KR100445632B1 (ko) * 2001-09-26 2004-08-25 삼성전자주식회사 커플링 노이즈를 감소시킬 수 있는 배선 구조
US7711337B2 (en) * 2006-01-14 2010-05-04 Paratek Microwave, Inc. Adaptive impedance matching module (AIMM) control architectures
US7626871B1 (en) * 2007-08-09 2009-12-01 Nvidia Corporation High-speed single-ended memory read circuit
US8154936B2 (en) * 2008-12-30 2012-04-10 Stmicroelectronics Pvt. Ltd. Single-ended bit line based storage system
US9489326B1 (en) 2009-03-09 2016-11-08 Cypress Semiconductor Corporation Multi-port integrated circuit devices and methods
US8595398B2 (en) * 2009-03-09 2013-11-26 Cypress Semiconductor Corp. Multi-port memory devices and methods

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57152589A (en) * 1981-03-13 1982-09-20 Fujitsu Ltd Semiconductor memory
DE3582828D1 (de) * 1984-07-26 1991-06-20 Texas Instruments Inc Dynamischer speicheraufbau mit segmentierten und quasi-gefalteten bitzeilen.
US5422857A (en) * 1989-11-21 1995-06-06 Matsushita Electric Industrial Co., Ltd. Semiconductor memory unit having overlapping addresses
US5355335A (en) * 1991-06-25 1994-10-11 Fujitsu Limited Semiconductor memory device having a plurality of writing and reading ports for decreasing hardware amount

Also Published As

Publication number Publication date
WO1997009719A1 (en) 1997-03-13
EP0848851B1 (de) 1999-09-15
EP0848851A1 (de) 1998-06-24
US5646893A (en) 1997-07-08
DE69604297T2 (de) 2000-05-11

Similar Documents

Publication Publication Date Title
DE69938378D1 (de) Datenkopieren in Speichersystemen
DE69631625D1 (de) Wahlfreier Zugriff in Mehrträgersystemen
ATE117132T1 (de) Anschlussleiste für die fernmelde- und datentechnik.
DE69718247D1 (de) Speicherverwaltung in fehlertoleranten Computersystemen
DE69731822D1 (de) Datenpuffersystem für mehrere datenspeicheranordnungen
DE69425367D1 (de) Leseschaltkreis für Speichermatrixzelle
DE69730797D1 (de) Funktionserweiterungsvorrichtung für Informationsverarbeitungsgerät
DE69710392D1 (de) Träger für lange PCI-Karte in einem Computergehäuse
DE69604297D1 (de) Segmentierte leseleitungsschaltung insbesondere für multiport speicheranordnungen
DE69401556D1 (de) Dynamische Redundanzschaltung für integrierten Speicher
DE69517888D1 (de) Auffrischungsverfahren und -schaltungen für Doppelbankspeicher
DE69627152D1 (de) Leseschaltung für Halbleiter-Speicherzellen
DE69504313D1 (de) Datenspeicher
DE69708684D1 (de) Trägerplatte mit biegsamer lagerung für integrierte schaltungen
DE69831775D1 (de) Verarbeitungsvorrichtung für zerteilte Schreibdaten in Speichersteuerungseinheiten
DE69626099D1 (de) Leseverstärker mit Verstärkungsmodulation, insbesondere für Speicheranordnungen
DE69720502D1 (de) Zweiseitige aufbewahrungseinheit für informationsträger
DE69713030D1 (de) Ablage für Aufzeichnungsträger
DE69119831D1 (de) Kennzeichnungsschild für Geräte, insbesondere für Datengeräte
DE59511077D1 (de) Analysegerät, insbesondere für Abwasser
DE69021704D1 (de) Vorladeschaltung für Speicherbus.
DE69518632D1 (de) Bitzeilen-Selektions-Dekodierer, insbesondere für elektronische Speicher
DE59408899D1 (de) Gehäuse, insbesondere für hydraulische Fördereinrichtungen
DE69413459D1 (de) Speicherschaltung für parallelen Datenausgang
DE59510684D1 (de) Warmwasserspeicher, insbesondere Elektro-Kleinspeicher

Legal Events

Date Code Title Description
8364 No opposition during term of opposition