DE69524645T2 - Speicherzelle mit programmierbarer Antischmelzsicherungstechnologie - Google Patents

Speicherzelle mit programmierbarer Antischmelzsicherungstechnologie

Info

Publication number
DE69524645T2
DE69524645T2 DE69524645T DE69524645T DE69524645T2 DE 69524645 T2 DE69524645 T2 DE 69524645T2 DE 69524645 T DE69524645 T DE 69524645T DE 69524645 T DE69524645 T DE 69524645T DE 69524645 T2 DE69524645 T2 DE 69524645T2
Authority
DE
Germany
Prior art keywords
memory cell
fuse technology
programmable anti
programmable
fuse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69524645T
Other languages
English (en)
Other versions
DE69524645D1 (de
Inventor
Mark G Harward
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69524645D1 publication Critical patent/DE69524645D1/de
Application granted granted Critical
Publication of DE69524645T2 publication Critical patent/DE69524645T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
DE69524645T 1994-01-13 1995-01-12 Speicherzelle mit programmierbarer Antischmelzsicherungstechnologie Expired - Lifetime DE69524645T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/181,523 US5426614A (en) 1994-01-13 1994-01-13 Memory cell with programmable antifuse technology

Publications (2)

Publication Number Publication Date
DE69524645D1 DE69524645D1 (de) 2002-01-31
DE69524645T2 true DE69524645T2 (de) 2002-08-08

Family

ID=22664644

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69524645T Expired - Lifetime DE69524645T2 (de) 1994-01-13 1995-01-12 Speicherzelle mit programmierbarer Antischmelzsicherungstechnologie

Country Status (4)

Country Link
US (1) US5426614A (de)
EP (1) EP0663665B1 (de)
JP (1) JPH0823080A (de)
DE (1) DE69524645T2 (de)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5680360A (en) * 1995-06-06 1997-10-21 Integrated Device Technology, Inc. Circuits for improving the reliablity of antifuses in integrated circuits
US5677888A (en) * 1995-06-06 1997-10-14 Integrated Device Technology, Inc. Redundancy circuit for programmable integrated circuits
JP2710235B2 (ja) * 1995-08-30 1998-02-10 日本電気株式会社 欠陥救済判定回路
GB2307320B (en) * 1995-11-18 2000-10-18 Motorola Inc Non-volatile memory cell and method of storing data therein
US6750107B1 (en) * 1996-01-31 2004-06-15 Micron Technology, Inc. Method and apparatus for isolating a SRAM cell
US6103579A (en) * 1996-01-31 2000-08-15 Micron Technology, Inc. Method of isolating a SRAM cell
US5896041A (en) * 1996-05-28 1999-04-20 Micron Technology, Inc. Method and apparatus for programming anti-fuses using internally generated programming voltage
US5841723A (en) * 1996-05-28 1998-11-24 Micron Technology, Inc. Method and apparatus for programming anti-fuses using an isolated well programming circuit
US5870327A (en) * 1996-07-19 1999-02-09 Xilinx, Inc. Mixed mode RAM/ROM cell using antifuses
US5724282A (en) * 1996-09-06 1998-03-03 Micron Technology, Inc. System and method for an antifuse bank
US5812477A (en) 1996-10-03 1998-09-22 Micron Technology, Inc. Antifuse detection circuit
US5768179A (en) * 1996-10-11 1998-06-16 Xilinx, Inc. Antifuse load sram cell
US5909049A (en) 1997-02-11 1999-06-01 Actel Corporation Antifuse programmed PROM cell
KR100487914B1 (ko) * 1997-12-29 2005-08-24 주식회사 하이닉스반도체 안티퓨우즈안정화회로
US6021078A (en) * 1998-01-27 2000-02-01 Motorola, Inc. Fuse circuit and method therefor which minimizes fuse grow back effect
US6041008A (en) * 1998-05-13 2000-03-21 Micron Technology Inc. Method and apparatus for embedded read only memory in static random access memory
KR100359855B1 (ko) * 1998-06-30 2003-01-15 주식회사 하이닉스반도체 가변전압발생기를이용한앤티퓨즈의프로그래밍회로
US6549035B1 (en) 1998-09-15 2003-04-15 Actel Corporation High density antifuse based partitioned FPGA architecture
FR2787911B1 (fr) * 1998-12-23 2001-11-02 St Microelectronics Sa Structure differentielle de cellules memoire a programmation unique en technologie cmos
KR100564421B1 (ko) * 1998-12-31 2006-06-23 주식회사 하이닉스반도체 메모리 소자의 데이터폭 설정회로
US7251150B2 (en) * 2001-10-23 2007-07-31 Aeroflex Colorado Springs Inc. Radiation-hardened programmable device
US6707708B1 (en) * 2002-09-10 2004-03-16 Intel Corporation Static random access memory with symmetric leakage-compensated bit line
US6775171B2 (en) * 2002-11-27 2004-08-10 Novocell Semiconductor, Inc. Method of utilizing voltage gradients to guide dielectric breakdowns for non-volatile memory elements and related embedded memories
US6816427B2 (en) * 2002-11-27 2004-11-09 Novocell Semiconductor, Inc. Method of utilizing a plurality of voltage pulses to program non-volatile memory elements and related embedded memories
US6775197B2 (en) 2002-11-27 2004-08-10 Novocell Semiconductor, Inc. Non-volatile memory element integratable with standard CMOS circuitry and related programming methods and embedded memories
US7728390B2 (en) * 2005-05-06 2010-06-01 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-level interconnection memory device
US7498655B2 (en) * 2006-03-28 2009-03-03 Intel Corporation Probe-based memory
US8254198B2 (en) * 2007-10-03 2012-08-28 Stmicroelectronics (Crolles 2) Sas Anti-fuse element
JP5371400B2 (ja) * 2007-12-14 2013-12-18 株式会社半導体エネルギー研究所 メモリ及び半導体装置
US7872934B2 (en) * 2007-12-14 2011-01-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for writing data into memory
US8885392B1 (en) * 2009-02-27 2014-11-11 Altera Corporation RAM/ROM memory circuit
US8294396B2 (en) * 2009-07-13 2012-10-23 Hamilton Sundstrand Space Systems International, Inc. Compact FPGA-based digital motor controller
US8611138B1 (en) * 2012-01-20 2013-12-17 Altera Corporation Circuits and methods for hardening volatile memory circuits through one time programming
RU2563548C2 (ru) * 2014-02-04 2015-09-20 Акционерное общество "Конструкторско-технологический центр "ЭЛЕКТРОНИКА" (АО "КТЦ "ЭЛЕКТРОНИКА") Радиационно-стойкая энергонезависимая программируемая логическая интегральная схема
US9245647B2 (en) * 2014-06-30 2016-01-26 Chengdu Monolithic Power Systems Co., Ltd. One-time programmable memory cell and circuit
US9922723B1 (en) * 2017-01-17 2018-03-20 Nxp Usa, Inc. Volatile latch circuit with tamper resistant non-volatile latch backup
US9953727B1 (en) * 2017-02-10 2018-04-24 Globalfoundries Inc. Circuit and method for detecting time dependent dielectric breakdown (TDDB) shorts and signal-margin testing

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6046545B2 (ja) * 1980-05-16 1985-10-16 日本電気株式会社 相補型ｍｏｓ記憶回路装置
US4418401A (en) * 1982-12-29 1983-11-29 Ibm Corporation Latent image ram cell
US4584669A (en) * 1984-02-27 1986-04-22 International Business Machines Corporation Memory cell with latent image capabilities
US4841481A (en) * 1985-10-25 1989-06-20 Hitachi, Ltd. Semiconductor memory device
JPH01294296A (ja) * 1988-05-20 1989-11-28 Fujitsu Ltd スタティック・ランダム・アクセス・メモリ
JPH0834292B2 (ja) * 1990-06-22 1996-03-29 シャープ株式会社 半導体記憶装置の書き込み方法
US5248632A (en) * 1992-09-29 1993-09-28 Texas Instruments Incorporated Method of forming an antifuse
US5455788A (en) * 1993-08-24 1995-10-03 Honeywell Inc. SRAM to ROM programming connections to avoid parasitic devices and electrical overstress sensitivity

Also Published As

Publication number Publication date
EP0663665A3 (de) 1996-12-11
JPH0823080A (ja) 1996-01-23
EP0663665B1 (de) 2001-12-19
EP0663665A2 (de) 1995-07-19
DE69524645D1 (de) 2002-01-31
US5426614A (en) 1995-06-20

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Legal Events

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8364 No opposition during term of opposition