DE69522408D1 - Statische Speicheranordnung für niedrige Spannung mit grosser Betriebstoleranz - Google Patents

Statische Speicheranordnung für niedrige Spannung mit grosser Betriebstoleranz

Info

Publication number
DE69522408D1
DE69522408D1 DE69522408T DE69522408T DE69522408D1 DE 69522408 D1 DE69522408 D1 DE 69522408D1 DE 69522408 T DE69522408 T DE 69522408T DE 69522408 T DE69522408 T DE 69522408T DE 69522408 D1 DE69522408 D1 DE 69522408D1
Authority
DE
Germany
Prior art keywords
low voltage
storage arrangement
static storage
large operating
operating tolerance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69522408T
Other languages
English (en)
Other versions
DE69522408T2 (de
Inventor
Takashi Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69522408D1 publication Critical patent/DE69522408D1/de
Publication of DE69522408T2 publication Critical patent/DE69522408T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
DE69522408T 1994-10-12 1995-10-12 Statische Speicheranordnung für niedrige Spannung mit grosser Betriebstoleranz Expired - Fee Related DE69522408T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6245738A JPH08111094A (ja) 1994-10-12 1994-10-12 スタチック型半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69522408D1 true DE69522408D1 (de) 2001-10-04
DE69522408T2 DE69522408T2 (de) 2002-05-29

Family

ID=17138072

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69522408T Expired - Fee Related DE69522408T2 (de) 1994-10-12 1995-10-12 Statische Speicheranordnung für niedrige Spannung mit grosser Betriebstoleranz

Country Status (5)

Country Link
US (1) US5642315A (de)
EP (1) EP0709852B1 (de)
JP (1) JPH08111094A (de)
KR (1) KR0170009B1 (de)
DE (1) DE69522408T2 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3220035B2 (ja) * 1997-02-27 2001-10-22 エヌイーシーマイクロシステム株式会社 スタチック型半導体記憶装置
JPH10247398A (ja) * 1997-03-05 1998-09-14 Matsushita Electric Ind Co Ltd 半導体記憶装置及びその検査方法
US6215708B1 (en) * 1998-09-30 2001-04-10 Integrated Device Technology, Inc. Charge pump for improving memory cell low VCC performance without increasing gate oxide thickness
KR100554135B1 (ko) * 1998-12-30 2006-05-16 주식회사 하이닉스반도체 워드라인 부트스트랩 회로
KR100558538B1 (ko) * 1999-01-19 2006-03-10 삼성전자주식회사 에스 램 셀의 전원 승압 회로
US6225849B1 (en) * 2000-02-25 2001-05-01 Advanced Micro Devices, Inc. High speed, high precision, power supply and process independent boost level clamping technique
KR100493889B1 (ko) * 2002-06-11 2005-06-10 신미혜 젤라틴을 이용한 셀러드 드레싱 및 그 제조방법
US7466582B2 (en) * 2005-08-15 2008-12-16 International Business Machines Corporation Voltage controlled static random access memory
US7352609B2 (en) * 2005-08-15 2008-04-01 International Business Machines Corporation Voltage controlled static random access memory
US7277351B2 (en) * 2005-11-17 2007-10-02 Altera Corporation Programmable logic device memory elements with elevated power supply levels
US7430148B2 (en) * 2005-11-17 2008-09-30 Altera Corporation Volatile memory elements with boosted output voltages for programmable logic device integrated circuits
US7411853B2 (en) * 2005-11-17 2008-08-12 Altera Corporation Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits
US7463057B1 (en) 2006-03-29 2008-12-09 Altera Corporation Integrated circuits with adjustable memory element power supplies
US7800400B2 (en) * 2007-01-12 2010-09-21 Altera Corporation Configuration random access memory
US7859301B2 (en) * 2007-04-30 2010-12-28 Altera Corporation Power regulator circuitry for programmable logic device memory elements
US7907456B2 (en) * 2007-10-31 2011-03-15 Texas Instruments Incorporated Memory having circuitry controlling the voltage differential between the word line and array supply voltage
US7957177B2 (en) * 2008-06-05 2011-06-07 Altera Corporation Static random-access memory with boosted voltages
US8072237B1 (en) 2009-06-04 2011-12-06 Altera Corporation Computer-aided design tools and memory element power supply circuitry for selectively overdriving circuit blocks
JP5398520B2 (ja) * 2009-12-25 2014-01-29 株式会社東芝 ワード線駆動回路
US8633731B1 (en) 2011-08-09 2014-01-21 Altera Corporation Programmable integrated circuit with thin-oxide passgates
US9444460B1 (en) 2013-11-22 2016-09-13 Altera Corporation Integrated circuits with programmable overdrive capabilities
US10121534B1 (en) 2015-12-18 2018-11-06 Altera Corporation Integrated circuit with overdriven and underdriven pass gates

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60253090A (ja) * 1984-05-30 1985-12-13 Hitachi Ltd 半導体装置
JPH0817034B2 (ja) * 1988-10-24 1996-02-21 三菱電機株式会社 半導体記憶装置
JP3112019B2 (ja) * 1989-12-08 2000-11-27 株式会社日立製作所 半導体装置
JPH03250494A (ja) * 1990-02-27 1991-11-08 Ricoh Co Ltd 半導体記憶装置
US5103113A (en) * 1990-06-13 1992-04-07 Texas Instruments Incorporated Driving circuit for providing a voltage boasted over the power supply voltage source as a driving signal
JPH05151789A (ja) * 1991-11-29 1993-06-18 Nec Corp 電気的に書込・一括消去可能な不揮発性半導体記憶装置
JP2838344B2 (ja) * 1992-10-28 1998-12-16 三菱電機株式会社 半導体装置
JPH05234363A (ja) * 1992-02-17 1993-09-10 Mitsubishi Electric Corp 半導体記憶装置
JP2905647B2 (ja) * 1992-04-30 1999-06-14 三菱電機株式会社 スタティックランダムアクセスメモリ装置
US5467306A (en) * 1993-10-04 1995-11-14 Texas Instruments Incorporated Method of using source bias to increase threshold voltages and/or to correct for over-erasure of flash eproms
JPH07230693A (ja) * 1994-02-16 1995-08-29 Toshiba Corp 半導体記憶装置

Also Published As

Publication number Publication date
EP0709852A2 (de) 1996-05-01
DE69522408T2 (de) 2002-05-29
EP0709852A3 (de) 1998-05-20
KR0170009B1 (ko) 1999-03-30
US5642315A (en) 1997-06-24
JPH08111094A (ja) 1996-04-30
EP0709852B1 (de) 2001-08-29
KR960015579A (ko) 1996-05-22

Similar Documents

Publication Publication Date Title
DE69522408T2 (de) Statische Speicheranordnung für niedrige Spannung mit grosser Betriebstoleranz
KR950703763A (ko) 고장허용 한계를 갖는 메모리장치
DE69527656D1 (de) Spannungspegelverschieber
DE69316628D1 (de) Flüchtige Speicherzelle
DE69229995D1 (de) Spannungsregler für Speichergeräte
DE69411406T2 (de) Stromspeicher
DE59913575D1 (de) Schaltungsanordnung für eine Ladungspumpe und Spannungsreglerschaltung mit einer derartigen Schaltungsanordnung
DE69707641D1 (de) Unterlegscheibe mit direkter spannungsanzeige
DE59400857D1 (de) Geräteträger für eine niederspannungs-schaltanlage
DE69506581T2 (de) Hochspannungsschalter mit selbstbeblasung
DE69413084D1 (de) Unterstützte Niederspannungs-Schreibschaltung
FR2712763B1 (fr) Générateur de courant ondulé à self saturable.
DE9419696U1 (de) Wägezellenanordnung
DE69506782D1 (de) Gehäuse, insbesondere für Niederspannungsgeräte
DE69631518D1 (de) Vorspannungsschaltung für UPROM-Zellen mit niedriger Versorgungsspannung
FI934158A0 (fi) Menetelmä ja kytkentäjärjestely teholähteen käynnistämiseksi
DE69504647D1 (de) Gekapselte hochspannungs-ventilanordnung
DE69417994D1 (de) Speicheranordnung
DE69631583D1 (de) UPROM-Zelle für niedrige Versorgungsspannung
DE69412714T2 (de) Ausgangstreiberschaltung für Niederspannungsgerät
DE69422655D1 (de) Hochspannungsphasentestanordnung
DE69517395T2 (de) Spannungsregler für Logikschaltung in gekoppeltem Betriebszustand
ITMI930786A0 (it) Interruttore scatolato per basse tensioni con amperometro incorporato
KR960001284U (ko) 방향제 수납케이스를 갖는 루움 밀러
DE9402492U1 (de) Ablagevorrichtung für Toilettenartikel

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee