DE69520198D1 - Schaltung zur Rückgewinnung von asynchron gesendeten Bits - Google Patents

Schaltung zur Rückgewinnung von asynchron gesendeten Bits

Info

Publication number
DE69520198D1
DE69520198D1 DE69520198T DE69520198T DE69520198D1 DE 69520198 D1 DE69520198 D1 DE 69520198D1 DE 69520198 T DE69520198 T DE 69520198T DE 69520198 T DE69520198 T DE 69520198T DE 69520198 D1 DE69520198 D1 DE 69520198D1
Authority
DE
Germany
Prior art keywords
recovery
circuit
asynchronously sent
sent bits
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69520198T
Other languages
English (en)
Other versions
DE69520198T2 (de
Inventor
Jean-Pierre Charvin
Christof Stumpf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Application granted granted Critical
Publication of DE69520198D1 publication Critical patent/DE69520198D1/de
Publication of DE69520198T2 publication Critical patent/DE69520198T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H03K5/082—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold
    • H03K5/086—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold generated by feedback
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
    • H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
    • H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
    • H04N7/0355—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal for discrimination of the binary level of the digital data, e.g. amplitude slicers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Television Systems (AREA)
DE69520198T 1994-12-16 1995-12-13 Schaltung zur Rückgewinnung von asynchron gesendeten Bits Expired - Fee Related DE69520198T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9415522A FR2728409B1 (fr) 1994-12-16 1994-12-16 Circuit de restitution de bits transmis de maniere asynchrone

Publications (2)

Publication Number Publication Date
DE69520198D1 true DE69520198D1 (de) 2001-04-05
DE69520198T2 DE69520198T2 (de) 2001-06-21

Family

ID=9470145

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69520198T Expired - Fee Related DE69520198T2 (de) 1994-12-16 1995-12-13 Schaltung zur Rückgewinnung von asynchron gesendeten Bits

Country Status (5)

Country Link
US (1) US5764703A (de)
EP (1) EP0717495B1 (de)
JP (1) JP2907087B2 (de)
DE (1) DE69520198T2 (de)
FR (1) FR2728409B1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5940442A (en) * 1997-01-30 1999-08-17 National Semioonductor Corporation High speed data receiver
US6249556B1 (en) * 1998-05-27 2001-06-19 Intel Corporation Dynamic thresholding for input receivers
US6028456A (en) * 1998-08-18 2000-02-22 Toko, Inc. Dual-threshold comparator circuit utilizing a single input pin
DE19956937A1 (de) * 1999-11-26 2001-05-31 Philips Corp Intellectual Pty Anordnung zur Rückgewinnung von Datenbits eines Datensignals
US20030048862A1 (en) * 2001-09-10 2003-03-13 Hsin-Hsien Lee Automatic calibration & synchronization for digital asynchronous communication
US7123046B2 (en) 2002-02-13 2006-10-17 Micron Technology, Inc Apparatus for adaptively adjusting a data receiver
US7036053B2 (en) * 2002-12-19 2006-04-25 Intel Corporation Two dimensional data eye centering for source synchronous data transfers
US7079609B2 (en) * 2003-07-31 2006-07-18 Motorola, Inc. Method and apparatus for reducing interference within a communication system
WO2006129349A1 (ja) * 2005-05-31 2006-12-07 Fujitsu Limited データ受信装置
US8300464B2 (en) 2010-04-13 2012-10-30 Freescale Semiconductor, Inc. Method and circuit for calibrating data capture in a memory controller
JP5794352B2 (ja) * 2013-05-29 2015-10-14 株式会社デンソー 受信装置及び受信ビット列の同一値ビット数検出方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5757025A (en) * 1980-09-24 1982-04-06 Sony Corp Waveform converting circuit
DE3633768A1 (de) * 1986-10-03 1988-04-14 Endress Hauser Gmbh Co Verfahren und anordnung zur erzeugung eines mittelwertfreien binaeren signals
FR2652697A1 (fr) 1989-10-03 1991-04-05 Sgs Thomson Microelectronics Extracteur de donnees numeriques dans un signal video.
US5469091A (en) * 1991-03-25 1995-11-21 Matsushita Electric Industrial Co., Ltd.K Data slice circuit
US5223930A (en) * 1991-10-18 1993-06-29 Zenith Electronics Corporation Data recovery system using dot clock counting
FR2683411B1 (fr) * 1991-11-06 1994-12-09 Inst Francais Du Petrole Methode et dispositif pour restituer un signal d'horloge rythmant la transmission de signaux recus.

Also Published As

Publication number Publication date
EP0717495B1 (de) 2001-02-28
DE69520198T2 (de) 2001-06-21
JPH08237308A (ja) 1996-09-13
FR2728409B1 (fr) 1997-03-14
US5764703A (en) 1998-06-09
JP2907087B2 (ja) 1999-06-21
FR2728409A1 (fr) 1996-06-21
EP0717495A1 (de) 1996-06-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee