DE69517265D1 - Speicheranordnung - Google Patents

Speicheranordnung

Info

Publication number
DE69517265D1
DE69517265D1 DE69517265T DE69517265T DE69517265D1 DE 69517265 D1 DE69517265 D1 DE 69517265D1 DE 69517265 T DE69517265 T DE 69517265T DE 69517265 T DE69517265 T DE 69517265T DE 69517265 D1 DE69517265 D1 DE 69517265D1
Authority
DE
Germany
Prior art keywords
storage arrangement
arrangement
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69517265T
Other languages
English (en)
Other versions
DE69517265T2 (de
Inventor
Colin Whitfield
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Ltd Great Britain
Original Assignee
STMicroelectronics Ltd Great Britain
SGS Thomson Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Ltd Great Britain, SGS Thomson Microelectronics Ltd filed Critical STMicroelectronics Ltd Great Britain
Publication of DE69517265D1 publication Critical patent/DE69517265D1/de
Application granted granted Critical
Publication of DE69517265T2 publication Critical patent/DE69517265T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/27—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements
    • G01R31/275—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements for testing individual semiconductor components within integrated circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE69517265T 1994-08-26 1995-08-21 Speicheranordnung Expired - Fee Related DE69517265T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9417264A GB9417264D0 (en) 1994-08-26 1994-08-26 Memory device

Publications (2)

Publication Number Publication Date
DE69517265D1 true DE69517265D1 (de) 2000-07-06
DE69517265T2 DE69517265T2 (de) 2000-10-26

Family

ID=10760447

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69517265T Expired - Fee Related DE69517265T2 (de) 1994-08-26 1995-08-21 Speicheranordnung

Country Status (5)

Country Link
US (1) US5652722A (de)
EP (1) EP0698889B1 (de)
JP (1) JP2967183B2 (de)
DE (1) DE69517265T2 (de)
GB (1) GB9417264D0 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0806771B1 (de) * 1996-04-30 2004-02-18 STMicroelectronics S.r.l. UPROM-Zelle für niedrige Versorgungsspannung
JP3545590B2 (ja) * 1997-03-14 2004-07-21 株式会社東芝 半導体装置
IT1296486B1 (it) 1997-11-21 1999-06-25 Ses Thomson Microelectronics S Regolatore di tensione per circuiti di memoria a singola tensione di alimentazione, in particolare per memorie di tipo flash.
US6219279B1 (en) 1999-10-29 2001-04-17 Zilog, Inc. Non-volatile memory program driver and read reference circuits
US7177181B1 (en) * 2001-03-21 2007-02-13 Sandisk 3D Llc Current sensing method and apparatus particularly useful for a memory array of cells having diode-like characteristics
US6545898B1 (en) * 2001-03-21 2003-04-08 Silicon Valley Bank Method and apparatus for writing memory arrays using external source of high programming voltage
KR100465065B1 (ko) * 2002-05-17 2005-01-06 주식회사 하이닉스반도체 클램핑 회로 및 이를 이용한 불휘발성 메모리 소자
US6954394B2 (en) 2002-11-27 2005-10-11 Matrix Semiconductor, Inc. Integrated circuit and method for selecting a set of memory-cell-layer-dependent or temperature-dependent operating conditions
ATE446578T1 (de) * 2002-12-12 2009-11-15 Nxp Bv Einmal programmierbare speicheranordnung
US7057958B2 (en) * 2003-09-30 2006-06-06 Sandisk Corporation Method and system for temperature compensation for memory cells with temperature-dependent behavior
US7152012B2 (en) * 2004-09-28 2006-12-19 Lsi Logic Corporation Four point measurement technique for programmable impedance drivers RapidChip and ASIC devices
US7218570B2 (en) * 2004-12-17 2007-05-15 Sandisk 3D Llc Apparatus and method for memory operations using address-dependent conditions
US7447077B2 (en) * 2005-08-05 2008-11-04 Halo Lsi, Inc. Referencing scheme for trap memory
US7283414B1 (en) 2006-05-24 2007-10-16 Sandisk 3D Llc Method for improving the precision of a temperature-sensor circuit
US8929132B2 (en) * 2011-11-17 2015-01-06 Everspin Technologies, Inc. Write driver circuit and method for writing to a spin-torque MRAM
US8902676B2 (en) * 2012-04-26 2014-12-02 SK Hynix Inc. Wordline coupling reduction technique
ITUB20159421A1 (it) * 2015-12-22 2017-06-22 St Microelectronics Srl Dispositivo per generare una tensione di riferimento comprendente una cella di memoria non volatile

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6016037B2 (ja) * 1980-01-09 1985-04-23 日本電気株式会社 メモリ装置
JPH0640566B2 (ja) * 1985-12-24 1994-05-25 日本電装株式会社 半導体集積回路
JPS62274781A (ja) * 1986-05-23 1987-11-28 Nec Corp 半導体装置
US4853628A (en) * 1987-09-10 1989-08-01 Gazelle Microcircuits, Inc. Apparatus for measuring circuit parameters of a packaged semiconductor device
JPH081759B2 (ja) * 1987-11-24 1996-01-10 株式会社東芝 不揮発性メモリ
US4858186A (en) * 1988-01-12 1989-08-15 Intle Corporation A circuit for providing a load for the charging of an EPROM cell
US4954990A (en) * 1989-05-30 1990-09-04 Cypress Semiconductor Corp. Programming voltage control circuit for EPROMS
JPH04103160A (ja) * 1990-08-22 1992-04-06 Ricoh Co Ltd 抵抗回路
JP3247402B2 (ja) * 1991-07-25 2002-01-15 株式会社東芝 半導体装置及び不揮発性半導体記憶装置
GR1002212B (en) * 1991-07-26 1996-03-28 Mcneil Ppc Inc Clean dry facing needled composite.
DE4219464A1 (de) * 1992-06-13 1993-12-16 Philips Patentverwaltung Verfahren und Schaltungsanordnung zum Erzeugen einer Programmierspannung
JP2822791B2 (ja) * 1992-06-30 1998-11-11 日本電気株式会社 半導体装置
US5398203A (en) * 1993-09-01 1995-03-14 Cypress Semiconductor Corporation Memory programming load-line circuit with dual slope I-V curve
US5444656A (en) * 1994-06-02 1995-08-22 Intel Corporation Apparatus for fast internal reference cell trimming
US5469384A (en) * 1994-09-27 1995-11-21 Cypress Semiconductor Corp. Decoding scheme for reliable multi bit hot electron programming

Also Published As

Publication number Publication date
GB9417264D0 (en) 1994-10-19
US5652722A (en) 1997-07-29
JPH08195097A (ja) 1996-07-30
EP0698889B1 (de) 2000-05-31
JP2967183B2 (ja) 1999-10-25
EP0698889A1 (de) 1996-02-28
DE69517265T2 (de) 2000-10-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee