DE69511992T2 - Halbleiteranordnung und Verfahren zur Herstellung - Google Patents

Halbleiteranordnung und Verfahren zur Herstellung

Info

Publication number
DE69511992T2
DE69511992T2 DE69511992T DE69511992T DE69511992T2 DE 69511992 T2 DE69511992 T2 DE 69511992T2 DE 69511992 T DE69511992 T DE 69511992T DE 69511992 T DE69511992 T DE 69511992T DE 69511992 T2 DE69511992 T2 DE 69511992T2
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69511992T
Other languages
English (en)
Other versions
DE69511992D1 (de
Inventor
Tetsuro Washida
Katsunori Ochi
Yasuhiro Murasawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of DE69511992D1 publication Critical patent/DE69511992D1/de
Publication of DE69511992T2 publication Critical patent/DE69511992T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10969—Metallic case or integral heatsink of component electrically connected to a pad on PCB
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
DE69511992T 1994-11-01 1995-10-30 Halbleiteranordnung und Verfahren zur Herstellung Expired - Fee Related DE69511992T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6269045A JPH08130267A (ja) 1994-11-01 1994-11-01 樹脂封止型半導体パッケージ、それを用いた樹脂封止型半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
DE69511992D1 DE69511992D1 (de) 1999-10-14
DE69511992T2 true DE69511992T2 (de) 2000-04-20

Family

ID=17466913

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69511992T Expired - Fee Related DE69511992T2 (de) 1994-11-01 1995-10-30 Halbleiteranordnung und Verfahren zur Herstellung

Country Status (4)

Country Link
EP (1) EP0711104B1 (de)
JP (1) JPH08130267A (de)
KR (1) KR100237912B1 (de)
DE (1) DE69511992T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007005670A (ja) * 2005-06-27 2007-01-11 Fujitsu Ltd 電子部品パッケージおよび接合組立体
KR100867637B1 (ko) 2006-11-10 2008-11-10 삼성전자주식회사 반도체 장치 및 이의 제조 방법
ITTO20120854A1 (it) * 2012-09-28 2014-03-29 Stmicroelectronics Malta Ltd Contenitore a montaggio superficiale perfezionato per un dispositivo integrato a semiconduttori, relativo assemblaggio e procedimento di fabbricazione
EP3470366B1 (de) * 2017-10-12 2020-07-08 Murata Manufacturing Co., Ltd. Reduzierung von vibration einer mems installation auf einer leiterplatte

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2488445A1 (fr) * 1980-08-06 1982-02-12 Efcis Boitier plastique pour circuits integres
JPS60208847A (ja) * 1984-04-02 1985-10-21 Oki Electric Ind Co Ltd 表面実装型ｉｃに内在する水分の排出方法
JPS62169450A (ja) * 1986-01-22 1987-07-25 Hitachi Ltd 半導体装置
KR930009031A (ko) * 1991-10-18 1993-05-22 김광호 반도체 패키지
US5177669A (en) * 1992-03-02 1993-01-05 Motorola, Inc. Molded ring integrated circuit package
JPH06209054A (ja) * 1993-01-08 1994-07-26 Mitsubishi Electric Corp 半導体装置

Also Published As

Publication number Publication date
JPH08130267A (ja) 1996-05-21
KR960019675A (ko) 1996-06-17
KR100237912B1 (ko) 2000-01-15
EP0711104B1 (de) 1999-09-08
DE69511992D1 (de) 1999-10-14
EP0711104A1 (de) 1996-05-08

Similar Documents

Publication Publication Date Title
DE69739763D1 (de) Halbleiteranordnung und Verfahren zur Herstellung
DE69515189D1 (de) SOI-Substrat und Verfahren zur Herstellung
DE69316810T2 (de) SiGe-SOI-MOSFET und Verfahren zur Herstellung
DE69530232D1 (de) Halbleiteranordnung mit isoliertem Gate und Verfahren zur Herstellung derselben
DE69628633D1 (de) Halbleiteranordnung mit isoliertem Gate und Verfahren zur Herstellung
DE69534700D1 (de) Halbleiteranordnungen und verfahren
DE69403593D1 (de) Gerät und Verfahren zur Herstellung einer Halbleitervorrichtung
DE69323827D1 (de) Diamant-Halbleiter und Verfahren zur Herstellung
DE69431023D1 (de) Halbleiteraufbau und Verfahren zur Herstellung
DE69631315T2 (de) Halbleiterspeicheranordnung und Verfahren zur Herstellung
DE69617772T2 (de) Thermistor-Vorrichtung und Verfahren zur Herstellung
DE69508885T2 (de) Halbleiterdiode und Verfahren zur Herstellung
DE69229314D1 (de) Halbleiteranordnung und Verfahren zur Herstellung
DE69709230T2 (de) Verfahren und Vorrichtung zur Herstellung Halbleitern
DE69227290T2 (de) Halbleiteranordnung und Verfahren zur Herstellung
DE69528683D1 (de) Halbleiterbauteil und Verfahren zur Herstellung desselben
DE69128406D1 (de) Lateraler MOSFET und Verfahren zur Herstellung
DE69416619D1 (de) Halbleiterspeicheranordnung und Verfahren zur Herstellung
DE69626299D1 (de) Halbleiteranordnung und verfahren zur herstellung
DE69417933D1 (de) Verfahren und Vorrichtung zur Herstellung von Halbleitervorrichtungen
DE69524529D1 (de) Halbleiterspeicheranordnung und Verfahren zur Herstellung
DE69511992D1 (de) Halbleiteranordnung und Verfahren zur Herstellung
DE69310031T2 (de) Quartzgerät und Verfahren zur Herstellung
DE69303643D1 (de) Halbleiterlaservorrichtung und Verfahren zur Herstellung
DE69624386T2 (de) Halbleiteranordnung und verfahren zur herstellung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee