DE69501752T2 - PLL-Frequenzsynthetisierer - Google Patents

PLL-Frequenzsynthetisierer

Info

Publication number
DE69501752T2
DE69501752T2 DE69501752T DE69501752T DE69501752T2 DE 69501752 T2 DE69501752 T2 DE 69501752T2 DE 69501752 T DE69501752 T DE 69501752T DE 69501752 T DE69501752 T DE 69501752T DE 69501752 T2 DE69501752 T2 DE 69501752T2
Authority
DE
Germany
Prior art keywords
frequency synthesizer
pll frequency
pll
synthesizer
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69501752T
Other languages
English (en)
Other versions
DE69501752D1 (de
Inventor
Masahiko Osaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69501752D1 publication Critical patent/DE69501752D1/de
Application granted granted Critical
Publication of DE69501752T2 publication Critical patent/DE69501752T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1972Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for reducing the locking time interval
DE69501752T 1994-05-09 1995-05-09 PLL-Frequenzsynthetisierer Expired - Fee Related DE69501752T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6095154A JP2616582B2 (ja) 1994-05-09 1994-05-09 Pll周波数シンセサイザ

Publications (2)

Publication Number Publication Date
DE69501752D1 DE69501752D1 (de) 1998-04-16
DE69501752T2 true DE69501752T2 (de) 1998-07-02

Family

ID=14129880

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69501752T Expired - Fee Related DE69501752T2 (de) 1994-05-09 1995-05-09 PLL-Frequenzsynthetisierer

Country Status (7)

Country Link
US (1) US5661440A (de)
EP (1) EP0682413B1 (de)
JP (1) JP2616582B2 (de)
CN (1) CN1068740C (de)
AU (1) AU693863B2 (de)
CA (1) CA2148896A1 (de)
DE (1) DE69501752T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL120223A0 (en) * 1997-02-14 1997-06-10 D S P C Israel Ltd Method and system for controlling frequency
US6215834B1 (en) * 1997-08-04 2001-04-10 Motorola Inc. Dual bandwidth phase locked loop frequency lock detection system and method
US6345079B1 (en) * 1997-10-29 2002-02-05 Victor Company Of Japan, Ltd. Clock signal generation apparatus
US6037821A (en) * 1998-05-28 2000-03-14 General Electric Company Digital programmable clock generator with improved accuracy
EP1030453A1 (de) * 1999-01-20 2000-08-23 Sony International (Europe) GmbH Methode zur Verringerung der Einschwingzeit eines PLL-Frequenzsynthetisierers mit progammierbaren Frequenzteiler
DE19947095A1 (de) * 1999-09-30 2001-05-03 Siemens Ag Vorrichtung zur Synchronisierung des Rahmentaktes in Einheiten/Knoten datenübertragender Systeme
JP2003133972A (ja) * 2001-10-29 2003-05-09 Fujitsu Ltd 無線送信機を有する電子装置
GB2409383B (en) 2003-12-17 2006-06-21 Wolfson Ltd Clock synchroniser
CN1992530B (zh) * 2005-12-29 2011-03-30 上海贝岭股份有限公司 一种简易的脉冲插值方法及装置
EP1988634B1 (de) * 2006-02-24 2013-11-27 Nihon Dempa Kogyo Co., Ltd. Pll-schaltung
CN101414820B (zh) * 2007-10-17 2011-04-06 中兴通讯股份有限公司 一种数字频率合成及同步电路
JP4850959B2 (ja) * 2009-06-12 2012-01-11 日本電波工業株式会社 Pll回路
JP5702391B2 (ja) * 2009-09-29 2015-04-15 テレフオンアクチーボラゲット エル エム エリクソン(パブル) 通信ネットワークにおける使用のための発振器、周波数シンセサイザ及びネットワークノード
JP5056886B2 (ja) * 2010-03-29 2012-10-24 カシオ電子工業株式会社 クロック信号生成装置及び電子装置
US8612794B2 (en) 2009-12-03 2013-12-17 Casio Electronics Manufacturing Co., Ltd. Clock signal generating device and electronic device
RU2460209C1 (ru) * 2011-02-07 2012-08-27 Государственное образовательное учреждение высшего профессионального образования Московский технический университет связи и информатики (ГОУ ВПО МТУСИ) Устройство измерения задержки сигналов точного времени в каналах связи
CN102412836B (zh) * 2011-09-30 2013-03-27 杭州电子科技大学 一种双可编程减法分频器
CN106209089A (zh) * 2016-08-02 2016-12-07 中国电子科技集团公司第三十八研究所 一种单环路分频式宽带锁相频率合成器

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4516083A (en) * 1982-05-14 1985-05-07 Motorola, Inc. Fast lock PLL having out of lock detector control of loop filter and divider
US4745371A (en) * 1985-08-02 1988-05-17 Libera Developments Limited Phase-locked digital synthesizer
DE3664738D1 (en) * 1985-08-28 1989-09-07 Tornos Sa Fabrique De Machine Drive device for an automatic turning machine
JPH03214925A (ja) * 1990-01-19 1991-09-20 Fujitsu Ltd Pllシンセサイザ回路
JP2798142B2 (ja) * 1990-06-15 1998-09-17 三菱電機株式会社 周波数シンセサイザ

Also Published As

Publication number Publication date
EP0682413B1 (de) 1998-03-11
DE69501752D1 (de) 1998-04-16
US5661440A (en) 1997-08-26
CA2148896A1 (en) 1995-11-10
JPH07303042A (ja) 1995-11-14
AU693863B2 (en) 1998-07-09
CN1117672A (zh) 1996-02-28
EP0682413A1 (de) 1995-11-15
AU1791295A (en) 1995-11-16
CN1068740C (zh) 2001-07-18
JP2616582B2 (ja) 1997-06-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee