DE69433525D1 - Verzögerungsschaltung mit einem digitalen Speicher - Google Patents

Verzögerungsschaltung mit einem digitalen Speicher

Info

Publication number
DE69433525D1
DE69433525D1 DE69433525T DE69433525T DE69433525D1 DE 69433525 D1 DE69433525 D1 DE 69433525D1 DE 69433525 T DE69433525 T DE 69433525T DE 69433525 T DE69433525 T DE 69433525T DE 69433525 D1 DE69433525 D1 DE 69433525D1
Authority
DE
Germany
Prior art keywords
delay circuit
digital memory
digital
memory
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69433525T
Other languages
English (en)
Other versions
DE69433525T2 (de
Inventor
Masato Onaya
Tsutomu Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP5189095A external-priority patent/JPH0784588A/ja
Priority claimed from JP5179515A external-priority patent/JP2989431B2/ja
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of DE69433525D1 publication Critical patent/DE69433525D1/de
Application granted granted Critical
Publication of DE69433525T2 publication Critical patent/DE69433525T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/16—Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters 

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
DE69433525T 1993-06-30 1994-06-29 Verzögerungsschaltung mit einem digitalen Speicher Expired - Fee Related DE69433525T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP18909593 1993-06-30
JP5189095A JPH0784588A (ja) 1993-06-30 1993-06-30 遅延回路
JP17951593 1993-07-21
JP5179515A JP2989431B2 (ja) 1993-07-21 1993-07-21 遅延回路

Publications (2)

Publication Number Publication Date
DE69433525D1 true DE69433525D1 (de) 2004-03-04
DE69433525T2 DE69433525T2 (de) 2004-07-01

Family

ID=26499344

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69433525T Expired - Fee Related DE69433525T2 (de) 1993-06-30 1994-06-29 Verzögerungsschaltung mit einem digitalen Speicher
DE69420896T Expired - Fee Related DE69420896T2 (de) 1993-06-30 1994-06-29 Verzögerungsleitung mit einem digitalen Speicher

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69420896T Expired - Fee Related DE69420896T2 (de) 1993-06-30 1994-06-29 Verzögerungsleitung mit einem digitalen Speicher

Country Status (4)

Country Link
US (1) US5576709A (de)
EP (2) EP0877380B1 (de)
KR (1) KR100196476B1 (de)
DE (2) DE69433525T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW369746B (en) * 1996-11-13 1999-09-11 Sanyo Electric Co Surround circuit
US6016113A (en) * 1997-06-26 2000-01-18 Binder; Yehuda System for enhancing the accuracy of analog-digital-analog conversions
DE19846461B4 (de) * 1997-10-08 2006-05-11 Hitachi, Ltd. Sensoreinstellschaltung
US20040251157A1 (en) * 2003-04-23 2004-12-16 Behnke Janica S. Packaging system for distrubuting and dispensing disposable cups and lids
US20090203750A1 (en) * 2005-08-24 2009-08-13 Alan Kozikowski 5-HT2C Receptor Agonists as Anorectic Agents
US20100128898A1 (en) * 2008-11-26 2010-05-27 Nuvoton Technology Corporation Method and apparatus for operation sequencing of audio amplifiers

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4219880B1 (en) * 1978-05-03 1997-11-18 Invest America Counseling Serv Signal-processing and conversion systems
GB2039432B (en) * 1978-10-02 1983-01-26 Lloyd Instr Electronic memory unit
JPS58211313A (ja) * 1982-06-03 1983-12-08 Victor Co Of Japan Ltd 楽音記録再生装置
JPS60185285A (ja) * 1984-03-02 1985-09-20 Hitachi Ltd 大容量メモリ回路

Also Published As

Publication number Publication date
EP0632459A2 (de) 1995-01-04
EP0632459A3 (de) 1995-09-20
US5576709A (en) 1996-11-19
DE69420896T2 (de) 2000-05-18
EP0632459B1 (de) 1999-09-29
KR950002252A (ko) 1995-01-04
EP0877380B1 (de) 2004-01-28
DE69433525T2 (de) 2004-07-01
EP0877380A1 (de) 1998-11-11
DE69420896D1 (de) 1999-11-04
KR100196476B1 (ko) 1999-06-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee