DE69431330T2 - Integrierte Schaltung mit einer leitfähigen Überkreuzung und Verfahren zu deren Herstellung - Google Patents

Integrierte Schaltung mit einer leitfähigen Überkreuzung und Verfahren zu deren Herstellung

Info

Publication number
DE69431330T2
DE69431330T2 DE69431330T DE69431330T DE69431330T2 DE 69431330 T2 DE69431330 T2 DE 69431330T2 DE 69431330 T DE69431330 T DE 69431330T DE 69431330 T DE69431330 T DE 69431330T DE 69431330 T2 DE69431330 T2 DE 69431330T2
Authority
DE
Germany
Prior art keywords
production
integrated circuit
conductive crossover
crossover
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69431330T
Other languages
English (en)
Other versions
DE69431330D1 (de
Inventor
Mike F Chang
King Owyang
Richard K Williams
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vishay Siliconix Inc
Original Assignee
Siliconix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siliconix Inc filed Critical Siliconix Inc
Publication of DE69431330D1 publication Critical patent/DE69431330D1/de
Application granted granted Critical
Publication of DE69431330T2 publication Critical patent/DE69431330T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Ceramic Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69431330T 1993-08-04 1994-07-18 Integrierte Schaltung mit einer leitfähigen Überkreuzung und Verfahren zu deren Herstellung Expired - Fee Related DE69431330T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/101,886 US5426325A (en) 1993-08-04 1993-08-04 Metal crossover in high voltage IC with graduated doping control

Publications (2)

Publication Number Publication Date
DE69431330D1 DE69431330D1 (de) 2002-10-17
DE69431330T2 true DE69431330T2 (de) 2003-05-22

Family

ID=22286973

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69431330T Expired - Fee Related DE69431330T2 (de) 1993-08-04 1994-07-18 Integrierte Schaltung mit einer leitfähigen Überkreuzung und Verfahren zu deren Herstellung
DE0637846T Pending DE637846T1 (de) 1993-08-04 1994-07-18 Metallüberkreuzung für Hochspannung-IC mit graduellem Datierungprofil.

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE0637846T Pending DE637846T1 (de) 1993-08-04 1994-07-18 Metallüberkreuzung für Hochspannung-IC mit graduellem Datierungprofil.

Country Status (4)

Country Link
US (1) US5426325A (de)
EP (1) EP0637846B1 (de)
JP (1) JP3084686B2 (de)
DE (2) DE69431330T2 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000507390A (ja) * 1994-11-16 2000-06-13 松下電器産業株式会社 半導体装置及びその製造方法
DE19526183C1 (de) * 1995-07-18 1996-09-12 Siemens Ag Verfahren zur Herstellung von mindestens zwei Transistoren in einem Halbleiterkörper
DE19536753C1 (de) * 1995-10-02 1997-02-20 El Mos Elektronik In Mos Techn MOS-Transistor mit hoher Ausgangsspannungsfestigkeit
JP4014676B2 (ja) 1996-08-13 2007-11-28 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置およびその作製方法
JP3634086B2 (ja) 1996-08-13 2005-03-30 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置の作製方法
US6703671B1 (en) * 1996-08-23 2004-03-09 Semiconductor Energy Laboratory Co., Ltd. Insulated gate semiconductor device and method of manufacturing the same
JP4059939B2 (ja) * 1996-08-23 2008-03-12 株式会社半導体エネルギー研究所 パワーｍｏｓデバイス及びその作製方法
JP4103968B2 (ja) 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
US6590230B1 (en) 1996-10-15 2003-07-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP4104701B2 (ja) 1997-06-26 2008-06-18 株式会社半導体エネルギー研究所 半導体装置
US6686623B2 (en) 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
JP4236722B2 (ja) * 1998-02-05 2009-03-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6420757B1 (en) 1999-09-14 2002-07-16 Vram Technologies, Llc Semiconductor diodes having low forward conduction voltage drop, low reverse current leakage, and high avalanche energy capability
US6313489B1 (en) 1999-11-16 2001-11-06 Philips Electronics North America Corporation Lateral thin-film silicon-on-insulator (SOI) device having a lateral drift region with a retrograde doping profile, and method of making such a device
US6433370B1 (en) 2000-02-10 2002-08-13 Vram Technologies, Llc Method and apparatus for cylindrical semiconductor diodes
US6580150B1 (en) 2000-11-13 2003-06-17 Vram Technologies, Llc Vertical junction field effect semiconductor diodes
US6537921B2 (en) 2001-05-23 2003-03-25 Vram Technologies, Llc Vertical metal oxide silicon field effect semiconductor diodes
US7719054B2 (en) 2006-05-31 2010-05-18 Advanced Analogic Technologies, Inc. High-voltage lateral DMOS device
US6958275B2 (en) * 2003-03-11 2005-10-25 Integrated Discrete Devices, Llc MOSFET power transistors and methods
EP1635397A1 (de) 2004-09-14 2006-03-15 STMicroelectronics S.r.l. Integriertes Leistungsbauelement mit verbessertem Randabschluss
TWI503893B (zh) 2008-12-30 2015-10-11 Vanguard Int Semiconduct Corp 半導體結構及其製作方法
US8618627B2 (en) 2010-06-24 2013-12-31 Fairchild Semiconductor Corporation Shielded level shift transistor
TWI609486B (zh) * 2016-12-30 2017-12-21 新唐科技股份有限公司 高壓半導體裝置
TWI609487B (zh) 2016-12-30 2017-12-21 新唐科技股份有限公司 半導體裝置
TWI634658B (zh) 2017-12-29 2018-09-01 新唐科技股份有限公司 半導體裝置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1214805B (it) * 1984-08-21 1990-01-18 Ates Componenti Elettron Spositivi a semiconduttore con giunprocesso per la fabbricazione di dizioni planari a concentrazione di carica variabile e ad altissima tensione di breakdown
JPS62274767A (ja) * 1986-05-23 1987-11-28 Fujitsu Ltd 高耐圧半導体装置及びその製造方法
JPS6484733A (en) * 1987-09-28 1989-03-30 Nec Corp Semiconductor device
IT1217214B (it) * 1988-04-27 1990-03-14 Sgs Thomson Microelectronics Circuito integrato per alta tensione con isolamento a giunzione
US5055896A (en) * 1988-12-15 1991-10-08 Siliconix Incorporated Self-aligned LDD lateral DMOS transistor with high-voltage interconnect capability
US4927772A (en) * 1989-05-30 1990-05-22 General Electric Company Method of making high breakdown voltage semiconductor device
US5132753A (en) * 1990-03-23 1992-07-21 Siliconix Incorporated Optimization of BV and RDS-on by graded doping in LDD and other high voltage ICs

Also Published As

Publication number Publication date
JP3084686B2 (ja) 2000-09-04
EP0637846A3 (de) 1996-01-10
DE69431330D1 (de) 2002-10-17
EP0637846A2 (de) 1995-02-08
DE637846T1 (de) 1995-11-30
EP0637846B1 (de) 2002-09-11
US5426325A (en) 1995-06-20
JPH07235597A (ja) 1995-09-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee