DE69428499T2 - Bedingtes Speicherladen von einem Registerpaar - Google Patents
Bedingtes Speicherladen von einem RegisterpaarInfo
- Publication number
- DE69428499T2 DE69428499T2 DE69428499T DE69428499T DE69428499T2 DE 69428499 T2 DE69428499 T2 DE 69428499T2 DE 69428499 T DE69428499 T DE 69428499T DE 69428499 T DE69428499 T DE 69428499T DE 69428499 T2 DE69428499 T2 DE 69428499T2
- Authority
- DE
- Germany
- Prior art keywords
- registers
- pair
- memory loading
- conditional memory
- conditional
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
- G06F9/30014—Arithmetic instructions with variable precision
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30094—Condition code generation, e.g. Carry, Zero flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30192—Instruction operation extension or modification according to data descriptor, e.g. dynamic data typing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Image Processing (AREA)
- Image Input (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/160,118 US6058473A (en) | 1993-11-30 | 1993-11-30 | Memory store from a register pair conditional upon a selected status bit |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69428499D1 DE69428499D1 (de) | 2001-11-08 |
DE69428499T2 true DE69428499T2 (de) | 2002-05-16 |
Family
ID=22575589
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69428499T Expired - Lifetime DE69428499T2 (de) | 1993-11-30 | 1994-11-30 | Bedingtes Speicherladen von einem Registerpaar |
Country Status (5)
Country | Link |
---|---|
US (3) | US6058473A (de) |
EP (1) | EP0656584B1 (de) |
JP (1) | JPH07271969A (de) |
KR (1) | KR100348951B1 (de) |
DE (1) | DE69428499T2 (de) |
Families Citing this family (76)
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US5774731A (en) * | 1995-03-22 | 1998-06-30 | Hitachi, Ltd. | Exclusive control method with each node controlling issue of an exclusive use request to a shared resource, a computer system therefor and a computer system with a circuit for detecting writing of an event flag into a shared main storage |
US5956494A (en) * | 1996-03-21 | 1999-09-21 | Motorola Inc. | Method, apparatus, and computer instruction for enabling gain control in a digital signal processor |
JPH1063500A (ja) * | 1996-08-23 | 1998-03-06 | Matsushita Electric Ind Co Ltd | 信号処理装置 |
US6279045B1 (en) | 1997-12-29 | 2001-08-21 | Kawasaki Steel Corporation | Multimedia interface having a multimedia processor and a field programmable gate array |
WO1999048025A2 (en) | 1998-03-18 | 1999-09-23 | Koninklijke Philips Electronics N.V. | Data processing device and method of computing the cosine transform of a matrix |
JP3123977B2 (ja) * | 1998-06-04 | 2001-01-15 | 日本電気株式会社 | プログラマブル機能ブロック |
US6163324A (en) * | 1998-06-30 | 2000-12-19 | Microsoft Corporation | Median calculation using SIMD operations |
US6952823B2 (en) * | 1998-09-01 | 2005-10-04 | Pkware, Inc. | Software patch generator using compression techniques |
JP2001005675A (ja) * | 1999-06-21 | 2001-01-12 | Matsushita Electric Ind Co Ltd | プログラム変換装置及びプロセッサ |
US6961084B1 (en) * | 1999-10-07 | 2005-11-01 | Ess Technology, Inc. | Programmable image transform processor |
US6318156B1 (en) * | 1999-10-28 | 2001-11-20 | Micro Motion, Inc. | Multiphase flow measurement system |
US6904515B1 (en) * | 1999-11-09 | 2005-06-07 | Ati International Srl | Multi-instruction set flag preservation apparatus and method |
US6574724B1 (en) * | 2000-02-18 | 2003-06-03 | Texas Instruments Incorporated | Microprocessor with non-aligned scaled and unscaled addressing |
US20060143249A1 (en) * | 2000-03-09 | 2006-06-29 | Pkware, Inc. | System and method for manipulating and managing computer archive files |
US20050015608A1 (en) * | 2003-07-16 | 2005-01-20 | Pkware, Inc. | Method for strongly encrypting .ZIP files |
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US8959582B2 (en) | 2000-03-09 | 2015-02-17 | Pkware, Inc. | System and method for manipulating and managing computer archive files |
US20060143199A1 (en) * | 2000-03-09 | 2006-06-29 | Pkware, Inc. | System and method for manipulating and managing computer archive files |
US8230482B2 (en) | 2000-03-09 | 2012-07-24 | Pkware, Inc. | System and method for manipulating and managing computer archive files |
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US6879988B2 (en) * | 2000-03-09 | 2005-04-12 | Pkware | System and method for manipulating and managing computer archive files |
US7844579B2 (en) * | 2000-03-09 | 2010-11-30 | Pkware, Inc. | System and method for manipulating and managing computer archive files |
US20060143180A1 (en) * | 2000-03-09 | 2006-06-29 | Pkware, Inc. | System and method for manipulating and managing computer archive files |
US20060143237A1 (en) * | 2000-03-09 | 2006-06-29 | Pkware, Inc. | System and method for manipulating and managing computer archive files |
US6598149B1 (en) * | 2000-03-31 | 2003-07-22 | Intel Corporation | Performance enhancement for code transitions of floating point and packed data modes |
US6789098B1 (en) * | 2000-10-23 | 2004-09-07 | Arm Limited | Method, data processing system and computer program for comparing floating point numbers |
US6766444B1 (en) * | 2000-11-02 | 2004-07-20 | Intel Corporation | Hardware loops |
US6381295B1 (en) * | 2001-04-13 | 2002-04-30 | Windbond Electronics Corp. | Shifter with overflow detection mechanism |
EP1410174A2 (de) * | 2001-04-23 | 2004-04-21 | Atmel Corporation | Mikroprozessor zur durchführung eines bytekompilierten java codes |
DE10202032A1 (de) * | 2002-01-18 | 2003-07-31 | Giesecke & Devrient Gmbh | Laden und Interpretieren von Daten |
FI118654B (fi) * | 2002-11-06 | 2008-01-31 | Nokia Corp | Menetelmä ja järjestelmä laskuoperaatioiden suorittamiseksi ja laite |
US7324112B1 (en) * | 2004-04-12 | 2008-01-29 | Nvidia Corporation | System and method for processing divergent samples in a programmable graphics processing unit |
US7477255B1 (en) | 2004-04-12 | 2009-01-13 | Nvidia Corporation | System and method for synchronizing divergent samples in a programmable graphics processing unit |
US7917906B2 (en) * | 2004-07-02 | 2011-03-29 | Seagate Technology Llc | Resource allocation in a computer-based system |
US7334116B2 (en) * | 2004-10-06 | 2008-02-19 | Sony Computer Entertainment Inc. | Bit manipulation on data in a bitstream that is stored in a memory having an address boundary length |
US7478224B2 (en) * | 2005-04-15 | 2009-01-13 | Atmel Corporation | Microprocessor access of operand stack as a register file using native instructions |
US8005885B1 (en) * | 2005-10-14 | 2011-08-23 | Nvidia Corporation | Encoded rounding control to emulate directed rounding during arithmetic operations |
US7921263B2 (en) * | 2006-12-22 | 2011-04-05 | Broadcom Corporation | System and method for performing masked store operations in a processor |
US7877430B2 (en) * | 2007-03-26 | 2011-01-25 | Analog Devices, Inc. | Method and apparatus for accelerating processing of adaptive finite impulse response filtering |
US7930522B2 (en) * | 2008-08-19 | 2011-04-19 | Freescale Semiconductor, Inc. | Method for speculative execution of instructions and a device having speculative execution capabilities |
US8266414B2 (en) | 2008-08-19 | 2012-09-11 | Freescale Semiconductor, Inc. | Method for executing an instruction loop and a device having instruction loop execution capabilities |
US8755515B1 (en) | 2008-09-29 | 2014-06-17 | Wai Wu | Parallel signal processing system and method |
US10802990B2 (en) * | 2008-10-06 | 2020-10-13 | International Business Machines Corporation | Hardware based mandatory access control |
US20100241638A1 (en) * | 2009-03-18 | 2010-09-23 | O'sullivan Patrick Joseph | Sorting contacts |
TW201215149A (en) | 2010-09-17 | 2012-04-01 | Alpha Imaging Technology Corp | Notebook computer for processing original high resolution images and image processing device thereof |
JP5961189B2 (ja) | 2011-01-14 | 2016-08-02 | 株式会社Nttドコモ | 算術符号化及び終了のための方法及び装置 |
US9811338B2 (en) * | 2011-11-14 | 2017-11-07 | Intel Corporation | Flag non-modification extension for ISA instructions using prefixes |
US10534606B2 (en) | 2011-12-08 | 2020-01-14 | Oracle International Corporation | Run-length encoding decompression |
US9015217B2 (en) | 2012-03-30 | 2015-04-21 | Apple Inc. | Transcendental and non-linear components using series expansion |
US9448801B2 (en) * | 2012-12-31 | 2016-09-20 | Cadence Design Systems, Inc. | Automatic register port selection in extensible processor architecture |
US9477473B2 (en) | 2012-12-31 | 2016-10-25 | Cadence Design Systems, Inc. | Bit-level register file updates in extensible processor architecture |
US20150052330A1 (en) * | 2013-08-14 | 2015-02-19 | Qualcomm Incorporated | Vector arithmetic reduction |
US11113054B2 (en) | 2013-09-10 | 2021-09-07 | Oracle International Corporation | Efficient hardware instructions for single instruction multiple data processors: fast fixed-length value compression |
US9378232B2 (en) | 2013-09-21 | 2016-06-28 | Oracle International Corporation | Framework for numa affinitized parallel query on in-memory objects within the RDBMS |
GB2529892B (en) * | 2014-09-08 | 2017-04-12 | Imagination Tech Ltd | Efficient loading and storing of data |
CN104317555B (zh) * | 2014-10-15 | 2017-03-15 | 中国航天科技集团公司第九研究院第七七一研究所 | Simd处理器中写合并和写撤销的处理装置和方法 |
US9769356B2 (en) | 2015-04-23 | 2017-09-19 | Google Inc. | Two dimensional shift array for image processor |
US10073885B2 (en) | 2015-05-29 | 2018-09-11 | Oracle International Corporation | Optimizer statistics and cost model for in-memory tables |
US10067954B2 (en) | 2015-07-22 | 2018-09-04 | Oracle International Corporation | Use of dynamic dictionary encoding with an associated hash table to support many-to-many joins and aggregations |
US10061714B2 (en) * | 2016-03-18 | 2018-08-28 | Oracle International Corporation | Tuple encoding aware direct memory access engine for scratchpad enabled multicore processors |
US10061832B2 (en) | 2016-11-28 | 2018-08-28 | Oracle International Corporation | Database tuple-encoding-aware data partitioning in a direct memory access engine |
US10055358B2 (en) * | 2016-03-18 | 2018-08-21 | Oracle International Corporation | Run length encoding aware direct memory access filtering engine for scratchpad enabled multicore processors |
US10402425B2 (en) * | 2016-03-18 | 2019-09-03 | Oracle International Corporation | Tuple encoding aware direct memory access engine for scratchpad enabled multi-core processors |
US10599488B2 (en) | 2016-06-29 | 2020-03-24 | Oracle International Corporation | Multi-purpose events for notification and sequence control in multi-core processor systems |
US10380058B2 (en) | 2016-09-06 | 2019-08-13 | Oracle International Corporation | Processor core to coprocessor interface with FIFO semantics |
US10127015B2 (en) * | 2016-09-30 | 2018-11-13 | International Business Machines Corporation | Decimal multiply and shift instruction |
US10783102B2 (en) | 2016-10-11 | 2020-09-22 | Oracle International Corporation | Dynamically configurable high performance database-aware hash engine |
US10176114B2 (en) | 2016-11-28 | 2019-01-08 | Oracle International Corporation | Row identification number generation in database direct memory access engine |
US10459859B2 (en) | 2016-11-28 | 2019-10-29 | Oracle International Corporation | Multicast copy ring for database direct memory access filtering engine |
US10725947B2 (en) | 2016-11-29 | 2020-07-28 | Oracle International Corporation | Bit vector gather row count calculation and handling in direct memory access engine |
KR102235803B1 (ko) * | 2017-03-31 | 2021-04-06 | 삼성전자주식회사 | 반도체 장치 |
US20190392287A1 (en) | 2018-06-22 | 2019-12-26 | Samsung Electronics Co., Ltd. | Neural processor |
US11211944B2 (en) | 2019-04-17 | 2021-12-28 | Samsung Electronics Co., Ltd. | Mixed-precision compression with random access |
US11671111B2 (en) | 2019-04-17 | 2023-06-06 | Samsung Electronics Co., Ltd. | Hardware channel-parallel data compression/decompression |
CN110708058B (zh) * | 2019-10-24 | 2023-05-30 | 大连东软信息学院 | 一种基于全自旋逻辑器件的2-4线译码器及其控制方法 |
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-
1993
- 1993-11-30 US US08/160,118 patent/US6058473A/en not_active Expired - Lifetime
-
1994
- 1994-11-30 KR KR1019940032080A patent/KR100348951B1/ko not_active IP Right Cessation
- 1994-11-30 JP JP6296705A patent/JPH07271969A/ja active Pending
- 1994-11-30 DE DE69428499T patent/DE69428499T2/de not_active Expired - Lifetime
- 1994-11-30 EP EP94308832A patent/EP0656584B1/de not_active Expired - Lifetime
-
1995
- 1995-06-07 US US08/478,129 patent/US5696959A/en not_active Expired - Lifetime
-
1999
- 1999-08-11 US US09/372,470 patent/US6173394B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0656584B1 (de) | 2001-10-04 |
DE69428499D1 (de) | 2001-11-08 |
US6173394B1 (en) | 2001-01-09 |
KR950015071A (ko) | 1995-06-16 |
JPH07271969A (ja) | 1995-10-20 |
EP0656584A1 (de) | 1995-06-07 |
US5696959A (en) | 1997-12-09 |
US6058473A (en) | 2000-05-02 |
KR100348951B1 (ko) | 2003-01-24 |
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