DE69430516T2 - Arithmetisch-logische Einheit mit drei Eingängen, die die Summe einer ersten und einer zweiten booleschen Kombination berechnet - Google Patents

Arithmetisch-logische Einheit mit drei Eingängen, die die Summe einer ersten und einer zweiten booleschen Kombination berechnet

Info

Publication number
DE69430516T2
DE69430516T2 DE69430516T DE69430516T DE69430516T2 DE 69430516 T2 DE69430516 T2 DE 69430516T2 DE 69430516 T DE69430516 T DE 69430516T DE 69430516 T DE69430516 T DE 69430516T DE 69430516 T2 DE69430516 T2 DE 69430516T2
Authority
DE
Germany
Prior art keywords
arithmetic
calculates
inputs
sum
logic unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69430516T
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English (en)
Other versions
DE69430516D1 (de
Inventor
Karl M Guttag
Richard Simpson
Brendan Walsh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69430516D1 publication Critical patent/DE69430516D1/de
Application granted granted Critical
Publication of DE69430516T2 publication Critical patent/DE69430516T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Image Processing (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Image Generation (AREA)
DE69430516T 1993-11-30 1994-11-30 Arithmetisch-logische Einheit mit drei Eingängen, die die Summe einer ersten und einer zweiten booleschen Kombination berechnet Expired - Lifetime DE69430516T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/160,113 US5465224A (en) 1993-11-30 1993-11-30 Three input arithmetic logic unit forming the sum of a first Boolean combination of first, second and third inputs plus a second Boolean combination of first, second and third inputs

Publications (2)

Publication Number Publication Date
DE69430516D1 DE69430516D1 (de) 2002-06-06
DE69430516T2 true DE69430516T2 (de) 2002-11-07

Family

ID=22575562

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69430516T Expired - Lifetime DE69430516T2 (de) 1993-11-30 1994-11-30 Arithmetisch-logische Einheit mit drei Eingängen, die die Summe einer ersten und einer zweiten booleschen Kombination berechnet

Country Status (5)

Country Link
US (1) US5465224A (de)
EP (1) EP0660227B1 (de)
JP (1) JPH087084A (de)
KR (1) KR100319352B1 (de)
DE (1) DE69430516T2 (de)

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US8626815B1 (en) 2008-07-14 2014-01-07 Altera Corporation Configuring a programmable integrated circuit device to perform matrix multiplication
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Also Published As

Publication number Publication date
DE69430516D1 (de) 2002-06-06
EP0660227B1 (de) 2002-05-02
US5465224A (en) 1995-11-07
KR950015057A (ko) 1995-06-16
EP0660227A2 (de) 1995-06-28
JPH087084A (ja) 1996-01-12
EP0660227A3 (de) 1996-01-24
KR100319352B1 (ko) 2002-04-22

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