DE69405634T2 - Vorrichtung und Verfahren zur Takterzeugung für eine Anzeigevorrichtung - Google Patents
Vorrichtung und Verfahren zur Takterzeugung für eine AnzeigevorrichtungInfo
- Publication number
- DE69405634T2 DE69405634T2 DE69405634T DE69405634T DE69405634T2 DE 69405634 T2 DE69405634 T2 DE 69405634T2 DE 69405634 T DE69405634 T DE 69405634T DE 69405634 T DE69405634 T DE 69405634T DE 69405634 T2 DE69405634 T2 DE 69405634T2
- Authority
- DE
- Germany
- Prior art keywords
- reference signal
- clock generating
- display device
- pll
- generating device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
- G09G5/008—Clock recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3622—Control of matrices with row and column drivers using a passive matrix
- G09G3/3629—Control of matrices with row and column drivers using a passive matrix using liquid crystals having memory effects, e.g. ferroelectric liquid crystals
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/363—Graphics controllers
- G09G5/366—Graphics controllers with conversion of CRT control signals to flat panel control signals, e.g. adapting the palette memory
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/04—Partial updating of the display screen
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2059—Display of intermediate tones using error diffusion
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Computer Graphics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Controls And Circuits For Display Device (AREA)
- Electrophonic Musical Instruments (AREA)
- Electric Clocks (AREA)
- Telephone Function (AREA)
- Synchronizing For Television (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP05102750A JP3109940B2 (ja) | 1993-04-28 | 1993-04-28 | 表示制御装置及び情報処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69405634D1 DE69405634D1 (de) | 1997-10-23 |
DE69405634T2 true DE69405634T2 (de) | 1998-02-26 |
Family
ID=14335901
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69405634T Expired - Fee Related DE69405634T2 (de) | 1993-04-28 | 1994-04-27 | Vorrichtung und Verfahren zur Takterzeugung für eine Anzeigevorrichtung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5706035A (de) |
EP (1) | EP0622775B1 (de) |
JP (1) | JP3109940B2 (de) |
AT (1) | ATE158436T1 (de) |
DE (1) | DE69405634T2 (de) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07199891A (ja) * | 1993-12-28 | 1995-08-04 | Canon Inc | 表示制御装置 |
JP3307750B2 (ja) * | 1993-12-28 | 2002-07-24 | キヤノン株式会社 | 表示制御装置 |
JP3302202B2 (ja) * | 1994-11-10 | 2002-07-15 | キヤノン株式会社 | 表示制御装置 |
JPH0981074A (ja) * | 1995-09-19 | 1997-03-28 | Fujitsu Ltd | ディスプレイ装置及びディスプレイユニット及びディスプレイ信号生成装置 |
JP3487119B2 (ja) * | 1996-05-07 | 2004-01-13 | 松下電器産業株式会社 | ドットクロック再生装置 |
US6067071A (en) * | 1996-06-27 | 2000-05-23 | Cirrus Logic, Inc. | Method and apparatus for expanding graphics images for LCD panels |
US6389177B1 (en) | 1996-07-02 | 2002-05-14 | Apple Computer, Inc. | System and method using edge processing to remove blocking artifacts from decompressed images |
US5914764A (en) * | 1996-09-25 | 1999-06-22 | Rockwell International Corporation | Method and apparatus for using optical response time to control a liquid crystal display |
US6195079B1 (en) | 1996-11-18 | 2001-02-27 | Sage, Inc. | On-screen user interface for a video adapter circuit |
AU5435898A (en) * | 1996-11-18 | 1998-06-10 | Sage, Inc. | Adapter circuit for a flat panel display monitor |
US5953074A (en) * | 1996-11-18 | 1999-09-14 | Sage, Inc. | Video adapter circuit for detection of analog video scanning formats |
US5907330A (en) * | 1996-12-18 | 1999-05-25 | Intel Corporation | Reducing power consumption and bus bandwidth requirements in cellular phones and PDAS by using a compressed display cache |
WO1999005666A1 (en) | 1997-07-25 | 1999-02-04 | Apple Computer, Inc. | System and method for generating high-luminance windows on a computer display device |
US6175361B1 (en) * | 1997-10-27 | 2001-01-16 | Sony Corporation | Frequency generation during switch-over for multi-frequency video monitor |
US6313823B1 (en) | 1998-01-20 | 2001-11-06 | Apple Computer, Inc. | System and method for measuring the color output of a computer monitor |
US6538648B1 (en) | 1998-04-28 | 2003-03-25 | Sanyo Electric Co., Ltd. | Display device |
US7412654B1 (en) | 1998-09-24 | 2008-08-12 | Apple, Inc. | Apparatus and method for handling special windows in a display |
US6310618B1 (en) * | 1998-11-13 | 2001-10-30 | Smartasic, Inc. | Clock generation for sampling analong video |
JP2005208992A (ja) * | 2004-01-23 | 2005-08-04 | Canon Inc | 位置情報出力装置及び信号処理方法 |
JP2008276132A (ja) * | 2007-05-07 | 2008-11-13 | Nec Electronics Corp | ドットクロック発生回路、半導体装置及びドットクロック発生方法 |
US20090189842A1 (en) * | 2008-01-24 | 2009-07-30 | Industrial Technology Research Institute | Backlight control apparatus |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4626837A (en) * | 1983-11-17 | 1986-12-02 | Wyse Technology | Display interface apparatus |
US4686567A (en) * | 1984-09-28 | 1987-08-11 | Sundstrand Data Control, Inc. | Timing circuit for varying the horizontal format of raster scanned display |
US5068731A (en) * | 1988-07-14 | 1991-11-26 | Seiko Epson Corporation | Video image enlargement and reduction system and method |
JP2531426B2 (ja) * | 1993-02-01 | 1996-09-04 | 日本電気株式会社 | マルチスキャン型液晶ディスプレイ装置 |
JP2537013B2 (ja) * | 1993-09-30 | 1996-09-25 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 液晶表示装置用のドット・クロック生成装置 |
-
1993
- 1993-04-28 JP JP05102750A patent/JP3109940B2/ja not_active Expired - Fee Related
-
1994
- 1994-04-27 AT AT94106558T patent/ATE158436T1/de not_active IP Right Cessation
- 1994-04-27 EP EP94106558A patent/EP0622775B1/de not_active Expired - Lifetime
- 1994-04-27 DE DE69405634T patent/DE69405634T2/de not_active Expired - Fee Related
- 1994-04-28 US US08/234,961 patent/US5706035A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0622775B1 (de) | 1997-09-17 |
DE69405634D1 (de) | 1997-10-23 |
EP0622775A1 (de) | 1994-11-02 |
JP3109940B2 (ja) | 2000-11-20 |
US5706035A (en) | 1998-01-06 |
ATE158436T1 (de) | 1997-10-15 |
JPH06314088A (ja) | 1994-11-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |