SE9503450D0 - Förfarande och anordning vid generering av en signal - Google Patents
Förfarande och anordning vid generering av en signalInfo
- Publication number
- SE9503450D0 SE9503450D0 SE9503450A SE9503450A SE9503450D0 SE 9503450 D0 SE9503450 D0 SE 9503450D0 SE 9503450 A SE9503450 A SE 9503450A SE 9503450 A SE9503450 A SE 9503450A SE 9503450 D0 SE9503450 D0 SE 9503450D0
- Authority
- SE
- Sweden
- Prior art keywords
- loop
- locked
- sampled
- pll
- support
- Prior art date
Links
- 230000001419 dependent effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/20—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a harmonic phase-locked loop, i.e. a loop which can be locked to one of a number of harmonically related frequencies applied to it
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
- H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9503450A SE505090C2 (sv) | 1995-10-05 | 1995-10-05 | Förfarande och anordning vid generering av en signal |
DE69617861T DE69617861T2 (de) | 1995-10-05 | 1996-09-30 | Verfahren und Anordnung zur Erzeugung eines Signals |
EP96850166A EP0767538B1 (en) | 1995-10-05 | 1996-09-30 | Method and device for generating a signal |
US08/725,493 US5739727A (en) | 1995-10-05 | 1996-10-04 | Sampled phase locked loop being locked with support from another phase locked loop |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9503450A SE505090C2 (sv) | 1995-10-05 | 1995-10-05 | Förfarande och anordning vid generering av en signal |
Publications (3)
Publication Number | Publication Date |
---|---|
SE9503450D0 true SE9503450D0 (sv) | 1995-10-05 |
SE9503450L SE9503450L (sv) | 1997-04-06 |
SE505090C2 SE505090C2 (sv) | 1997-06-23 |
Family
ID=20399708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9503450A SE505090C2 (sv) | 1995-10-05 | 1995-10-05 | Förfarande och anordning vid generering av en signal |
Country Status (4)
Country | Link |
---|---|
US (1) | US5739727A (sv) |
EP (1) | EP0767538B1 (sv) |
DE (1) | DE69617861T2 (sv) |
SE (1) | SE505090C2 (sv) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19644861A1 (de) * | 1996-10-29 | 1998-04-30 | Daimler Benz Aerospace Ag | Verfahren zur Erzeugung eines analogen hochfrequenten Signals und Anordnung zur Durchführung des Verfahrens |
EP0941580B1 (de) * | 1996-11-26 | 2002-01-30 | Siemens Aktiengesellschaft | Synchronisationseinrichtung einer baugruppe |
US5940608A (en) * | 1997-02-11 | 1999-08-17 | Micron Technology, Inc. | Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal |
US5946244A (en) | 1997-03-05 | 1999-08-31 | Micron Technology, Inc. | Delay-locked loop with binary-coupled capacitor |
US6173432B1 (en) | 1997-06-20 | 2001-01-09 | Micron Technology, Inc. | Method and apparatus for generating a sequence of clock signals |
US6064947A (en) * | 1997-08-27 | 2000-05-16 | Texas Instruments Incorporated | Time base generator internal voltage-controlled oscillator calibration system and method |
US5940609A (en) * | 1997-08-29 | 1999-08-17 | Micorn Technology, Inc. | Synchronous clock generator including a false lock detector |
US6269451B1 (en) | 1998-02-27 | 2001-07-31 | Micron Technology, Inc. | Method and apparatus for adjusting data timing by delaying clock signal |
US6028460A (en) * | 1998-06-08 | 2000-02-22 | Comtech Communications Corp. | Hybrid analog-digital phase lock loop multi-frequency synthesizer |
US6338127B1 (en) | 1998-08-28 | 2002-01-08 | Micron Technology, Inc. | Method and apparatus for resynchronizing a plurality of clock signals used to latch respective digital signals, and memory device using same |
US6349399B1 (en) | 1998-09-03 | 2002-02-19 | Micron Technology, Inc. | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same |
US6430696B1 (en) | 1998-11-30 | 2002-08-06 | Micron Technology, Inc. | Method and apparatus for high speed data capture utilizing bit-to-bit timing correction, and memory device using same |
US6374360B1 (en) | 1998-12-11 | 2002-04-16 | Micron Technology, Inc. | Method and apparatus for bit-to-bit timing correction of a high speed memory bus |
US6470060B1 (en) | 1999-03-01 | 2002-10-22 | Micron Technology, Inc. | Method and apparatus for generating a phase dependent control signal |
KR100529150B1 (ko) * | 1999-06-24 | 2005-11-16 | 매그나칩 반도체 유한회사 | 주파수 옵셋 및 위상 에러를 동시에 줄이는 반송파 주파수 복구 방법 및 장치 |
US6826246B1 (en) * | 1999-10-15 | 2004-11-30 | Agere Systems, Inc. | Phase locked loop with control voltage centering |
US6973145B1 (en) * | 2000-09-01 | 2005-12-06 | Ut-Battelle, Llc | Digital-data receiver synchronization method and apparatus |
US6801989B2 (en) | 2001-06-28 | 2004-10-05 | Micron Technology, Inc. | Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same |
JP2003318732A (ja) * | 2002-04-26 | 2003-11-07 | Hitachi Ltd | 通信用半導体集積回路および無線通信システム |
US7013403B2 (en) | 2002-07-19 | 2006-03-14 | Sun Microsystems, Inc. | Synthesizing a pixel clock with extremely close channel spacing |
GB2393050B (en) * | 2002-09-13 | 2006-11-15 | Hitachi Ltd | Communication semiconductor integrated circuit and radio communication system |
WO2004049574A1 (de) * | 2002-11-28 | 2004-06-10 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Frequenzgenerator |
US7168027B2 (en) | 2003-06-12 | 2007-01-23 | Micron Technology, Inc. | Dynamic synchronization of data capture on an optical or other high speed communications link |
US7084709B1 (en) | 2004-11-19 | 2006-08-01 | Colin Wai Mun Leong | Hybrid analog/digital phase lock loop frequency synthesizer |
US7180377B1 (en) | 2005-01-18 | 2007-02-20 | Silicon Clocks Inc. | Method and apparatus for a hybrid phase lock loop frequency synthesizer |
EP2003783A4 (en) * | 2006-03-31 | 2011-03-09 | Nihon Dempa Kogyo Co | DIGITAL PROCESSING DEVICE |
US9112517B1 (en) * | 2013-06-04 | 2015-08-18 | Pmc-Sierra Us, Inc. | Low-noise flexible frequency clock generation from two fixed-frequency references |
US9453906B2 (en) * | 2014-07-31 | 2016-09-27 | North Carolina State University | Phase calibration circuit and method for multi-channel radar receiver |
US9571111B1 (en) * | 2015-12-09 | 2017-02-14 | GlobalFoundries, Inc. | System and method to speed up PLL lock time on subsequent calibrations via stored band values |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3660781A (en) | 1970-10-19 | 1972-05-02 | Bendix Corp | Low power frequency synthesizer with two phase locking loops |
JPS57125528A (en) * | 1981-01-28 | 1982-08-04 | Advantest Corp | Frequency synthesizer |
US4484152A (en) * | 1982-05-19 | 1984-11-20 | Westinghouse Electric Corp. | Phase-locked loop having improved locking capabilities |
US4864252A (en) * | 1988-09-26 | 1989-09-05 | Motorola, Inc. | Sample-and-hold phase detector for use in a phase locked loop |
US4994762A (en) * | 1989-11-20 | 1991-02-19 | Motorola, Inc. | Multiloop synthesizer with optimal spurious performance |
US5184350A (en) * | 1991-04-17 | 1993-02-02 | Raytheon Company | Telephone communication system having an enhanced timing circuit |
JP3033654B2 (ja) * | 1993-08-23 | 2000-04-17 | 日本電気株式会社 | Pll周波数シンセサイザ |
-
1995
- 1995-10-05 SE SE9503450A patent/SE505090C2/sv not_active IP Right Cessation
-
1996
- 1996-09-30 EP EP96850166A patent/EP0767538B1/en not_active Expired - Lifetime
- 1996-09-30 DE DE69617861T patent/DE69617861T2/de not_active Expired - Lifetime
- 1996-10-04 US US08/725,493 patent/US5739727A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69617861D1 (de) | 2002-01-24 |
SE505090C2 (sv) | 1997-06-23 |
SE9503450L (sv) | 1997-04-06 |
EP0767538B1 (en) | 2001-12-12 |
US5739727A (en) | 1998-04-14 |
DE69617861T2 (de) | 2002-08-01 |
EP0767538A1 (en) | 1997-04-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SE9503450L (sv) | Förfarande och anordning vid generering av en signal | |
GB2289175A (en) | Phase lock loop synchronization circuit and method | |
MY109097A (en) | An adaptive phase locked loop | |
AU2003207487A1 (en) | Low-jitter loop filter for a phase-locked loop system | |
EP0865019A3 (en) | A method and apparatus for clock recovery in a digital display unit | |
SE9503702L (sv) | Fastlåst loop | |
ATE362226T1 (de) | Vorrichtung zur erzeugung eines schwingenden signals mit einer gewünschten phasenlage zu einem eingangssignal | |
SE9502844D0 (sv) | Apparat och sätt för styrning av slingbandbredden för en pll | |
ATE158436T1 (de) | Vorrichtung und verfahren zur takterzeugung für eine anzeigevorrichtung | |
DE60007679D1 (de) | PLL Schaltkreis | |
KR950035094A (ko) | 향상된 위상 동기 루프 | |
DK0660611T3 (da) | Et kredsløb til genopretning af clocksignal til seriel digital video | |
GB2289384A (en) | Phase locked loop error suppression circuit and method | |
EP1104113A3 (en) | Clock and data recovery circuit for optical receiver | |
MY112455A (en) | Optical disc apparatus | |
GB2289174A (en) | Apparatus and method for enabling elements of a phase locked loop | |
DE68906305D1 (de) | Anordnung zum ableiten einer abtastfrequenz. | |
KR900702658A (ko) | 위상 고정루프에 사용하는 샘플 및 홀드 위상 검출기 | |
EP1143622A4 (en) | PHASE CONTROL LOOP | |
DE69634365D1 (de) | Vorrichtung zur synchronisation eines digitalen empfängers | |
DE3852954D1 (de) | Integrierbare phasenregelschleife. | |
KR970008899A (ko) | 위상 동기 루프 방식 에프엠 검파회로의 출력레벨 조정장치 | |
DK224688A (da) | Oscillatorindretning til frembringelse af mindst to forskellige frekvenser | |
JP3712141B2 (ja) | 位相同期ループ装置 | |
DE69625840D1 (de) | Verfahren und Anordnung mit schneller Phasenregelschleife |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |