DE69324926T2 - Doppelte pufferungspeicherung zwischen dem speicherbus und dem expansionsbus eines rechnersystems - Google Patents

Doppelte pufferungspeicherung zwischen dem speicherbus und dem expansionsbus eines rechnersystems

Info

Publication number
DE69324926T2
DE69324926T2 DE69324926T DE69324926T DE69324926T2 DE 69324926 T2 DE69324926 T2 DE 69324926T2 DE 69324926 T DE69324926 T DE 69324926T DE 69324926 T DE69324926 T DE 69324926T DE 69324926 T2 DE69324926 T2 DE 69324926T2
Authority
DE
Germany
Prior art keywords
double
read
main memory
buffers
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69324926T
Other languages
English (en)
Other versions
DE69324926D1 (de
Inventor
Paul Culley
Mark Taylor
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Compaq Computer Corp
Original Assignee
Compaq Computer Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compaq Computer Corp filed Critical Compaq Computer Corp
Publication of DE69324926D1 publication Critical patent/DE69324926D1/de
Application granted granted Critical
Publication of DE69324926T2 publication Critical patent/DE69324926T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
  • Debugging And Monitoring (AREA)
  • Hardware Redundancy (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
DE69324926T 1992-10-02 1993-09-29 Doppelte pufferungspeicherung zwischen dem speicherbus und dem expansionsbus eines rechnersystems Expired - Lifetime DE69324926T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/956,068 US5519839A (en) 1992-10-02 1992-10-02 Double buffering operations between the memory bus and the expansion bus of a computer system
PCT/US1993/009366 WO1994008296A1 (en) 1992-10-02 1993-09-29 Double buffering operations between the memory bus and the expansion bus of a computer system

Publications (2)

Publication Number Publication Date
DE69324926D1 DE69324926D1 (de) 1999-06-17
DE69324926T2 true DE69324926T2 (de) 1999-09-16

Family

ID=25497712

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69324926T Expired - Lifetime DE69324926T2 (de) 1992-10-02 1993-09-29 Doppelte pufferungspeicherung zwischen dem speicherbus und dem expansionsbus eines rechnersystems

Country Status (7)

Country Link
US (3) US5519839A (de)
EP (1) EP0664030B1 (de)
AT (1) ATE180071T1 (de)
AU (1) AU5402594A (de)
CA (1) CA2146138A1 (de)
DE (1) DE69324926T2 (de)
WO (1) WO1994008296A1 (de)

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US5905879A (en) * 1995-11-20 1999-05-18 Advanced Micro Devices, Inc. System and method for transferring periodic data streams on a multimedia bus
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US6052513A (en) * 1996-06-05 2000-04-18 Compaq Computer Corporation Multi-threaded bus master
US6075929A (en) * 1996-06-05 2000-06-13 Compaq Computer Corporation Prefetching data in response to a read transaction for which the requesting device relinquishes control of the data bus while awaiting data requested in the transaction
US6108741A (en) * 1996-06-05 2000-08-22 Maclaren; John M. Ordering transactions
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US5987539A (en) * 1996-06-05 1999-11-16 Compaq Computer Corporation Method and apparatus for flushing a bridge device read buffer
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US5784705A (en) * 1996-07-15 1998-07-21 Mosys, Incorporated Method and structure for performing pipeline burst accesses in a semiconductor memory
US5991819A (en) * 1996-12-03 1999-11-23 Intel Corporation Dual-ported memory controller which maintains cache coherency using a memory line status table
US6138192A (en) * 1996-12-31 2000-10-24 Compaq Computer Corporation Delivering a request to write or read data before delivering an earlier write request
US6134635A (en) * 1997-12-09 2000-10-17 Intel Corporation Method and apparatus of resolving a deadlock by collapsing writebacks to a memory
US6438660B1 (en) 1997-12-09 2002-08-20 Intel Corporation Method and apparatus for collapsing writebacks to a memory for resource efficiency
US6163835A (en) * 1998-07-06 2000-12-19 Motorola, Inc. Method and apparatus for transferring data over a processor interface bus
US6233639B1 (en) 1999-01-04 2001-05-15 International Business Machines Corporation Memory card utilizing two wire bus
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PL202762B1 (pl) * 2002-12-30 2009-07-31 Adb Polska Sp Układ obsługi dekoderowych kart rozszerzeń i uniwersalnych kart rozszerzeń
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US20040193833A1 (en) * 2003-03-27 2004-09-30 Kathryn Hampton Physical mode addressing
US8023520B2 (en) * 2003-03-27 2011-09-20 Hewlett-Packard Development Company, L.P. Signaling packet
US7554993B2 (en) * 2003-03-27 2009-06-30 Hewlett-Packard Development Company, L.P. Method and apparatus for performing connection management with multiple stacks
US8291176B2 (en) * 2003-03-27 2012-10-16 Hewlett-Packard Development Company, L.P. Protection domain groups to isolate access to memory windows
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US7565504B2 (en) 2003-03-27 2009-07-21 Hewlett-Packard Development Company, L.P. Memory window access mechanism
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US7617376B2 (en) * 2003-08-14 2009-11-10 Hewlett-Packard Development Company, L.P. Method and apparatus for accessing a memory
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US7404190B2 (en) * 2003-09-18 2008-07-22 Hewlett-Packard Development Company, L.P. Method and apparatus for providing notification via multiple completion queue handlers
US8959171B2 (en) 2003-09-18 2015-02-17 Hewlett-Packard Development Company, L.P. Method and apparatus for acknowledging a request for data transfer
US8150996B2 (en) * 2003-12-16 2012-04-03 Hewlett-Packard Development Company, L.P. Method and apparatus for handling flow control for a data transfer
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JP5800565B2 (ja) * 2011-05-11 2015-10-28 キヤノン株式会社 データ転送装置及びデータ転送方法
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US11086967B2 (en) 2017-03-01 2021-08-10 Texas Instruments Incorporated Implementing fundamental computational primitives using a matrix multiplication accelerator (MMA)
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Also Published As

Publication number Publication date
DE69324926D1 (de) 1999-06-17
EP0664030B1 (de) 1999-05-12
ATE180071T1 (de) 1999-05-15
US5519839A (en) 1996-05-21
EP0664030A1 (de) 1995-07-26
WO1994008296A1 (en) 1994-04-14
US5870568A (en) 1999-02-09
AU5402594A (en) 1994-04-26
CA2146138A1 (en) 1994-04-14
US6018620A (en) 2000-01-25

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Legal Events

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