DE69322233T2 - Elektronisches Teil mit metallischen Leiterbahnen und Verfahren zu seiner Herstellung - Google Patents

Elektronisches Teil mit metallischen Leiterbahnen und Verfahren zu seiner Herstellung

Info

Publication number
DE69322233T2
DE69322233T2 DE69322233T DE69322233T DE69322233T2 DE 69322233 T2 DE69322233 T2 DE 69322233T2 DE 69322233 T DE69322233 T DE 69322233T DE 69322233 T DE69322233 T DE 69322233T DE 69322233 T2 DE69322233 T2 DE 69322233T2
Authority
DE
Germany
Prior art keywords
manufacture
conductor tracks
electronic part
metallic conductor
metallic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69322233T
Other languages
English (en)
Other versions
DE69322233D1 (de
Inventor
Hiroshi Toyoda
Hisashi Kaneko
Masahiko Hasunuma
Takashi Kawanoue
Hiroshi Tomita
Akihiro Kajita
Masami Miyauchi
Takashi Kawakubo
Sachiyo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69322233D1 publication Critical patent/DE69322233D1/de
Application granted granted Critical
Publication of DE69322233T2 publication Critical patent/DE69322233T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H01L23/5283—Cross-sectional geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051—Deposition of metallic or metal-silicide layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
DE69322233T 1992-08-27 1993-08-23 Elektronisches Teil mit metallischen Leiterbahnen und Verfahren zu seiner Herstellung Expired - Lifetime DE69322233T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP22826492 1992-08-27
JP8010893 1993-03-15

Publications (2)

Publication Number Publication Date
DE69322233D1 DE69322233D1 (de) 1999-01-07
DE69322233T2 true DE69322233T2 (de) 1999-07-08

Family

ID=26421158

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69322233T Expired - Lifetime DE69322233T2 (de) 1992-08-27 1993-08-23 Elektronisches Teil mit metallischen Leiterbahnen und Verfahren zu seiner Herstellung
DE69333966T Expired - Lifetime DE69333966T2 (de) 1992-08-27 1993-08-23 Elektronisches Bauteil mit metallischen Leiterbahnen und Verfahren zu seiner Herstellung

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69333966T Expired - Lifetime DE69333966T2 (de) 1992-08-27 1993-08-23 Elektronisches Bauteil mit metallischen Leiterbahnen und Verfahren zu seiner Herstellung

Country Status (3)

Country Link
EP (2) EP0725439B1 (de)
KR (1) KR0132402B1 (de)
DE (2) DE69322233T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6037257A (en) * 1997-05-08 2000-03-14 Applied Materials, Inc. Sputter deposition and annealing of copper alloy metallization
US6387805B2 (en) 1997-05-08 2002-05-14 Applied Materials, Inc. Copper alloy seed layer for copper metallization
US6181012B1 (en) 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
US6516030B1 (en) 1998-05-14 2003-02-04 Interval Research Corporation Compression of combined black/white and color video signal
US6461675B2 (en) 1998-07-10 2002-10-08 Cvc Products, Inc. Method for forming a copper film on a substrate
SG79235A1 (en) * 1998-07-16 2001-03-20 Univ Singapore Highly selective and complete interconnect metal line and via/contact hole filling by electroless plating
US6190732B1 (en) 1998-09-03 2001-02-20 Cvc Products, Inc. Method and system for dispensing process gas for fabricating a device on a substrate
US6268284B1 (en) * 1998-10-07 2001-07-31 Tokyo Electron Limited In situ titanium aluminide deposit in high aspect ratio features
US6570924B1 (en) 1998-11-20 2003-05-27 Interval Research Corp Low cost video compression using fast, modified Z-coding of wavelet pyramids
US6294836B1 (en) 1998-12-22 2001-09-25 Cvc Products Inc. Semiconductor chip interconnect barrier material and fabrication method
US6245655B1 (en) 1999-04-01 2001-06-12 Cvc Products, Inc. Method for planarized deposition of a material
US6440849B1 (en) * 1999-10-18 2002-08-27 Agere Systems Guardian Corp. Microstructure control of copper interconnects
US6627995B2 (en) 2000-03-03 2003-09-30 Cvc Products, Inc. Microelectronic interconnect material with adhesion promotion layer and fabrication method
US6444263B1 (en) 2000-09-15 2002-09-03 Cvc Products, Inc. Method of chemical-vapor deposition of a material
JP2004179327A (ja) * 2002-11-26 2004-06-24 Sharp Corp 半導体用合金材料、該合金材料を用いた半導体チップ及びその製造方法
US7749361B2 (en) 2006-06-02 2010-07-06 Applied Materials, Inc. Multi-component doping of copper seed layer
CN110364538A (zh) * 2018-04-11 2019-10-22 Ａｇｃ株式会社 布线膜和布线膜的形成方法
KR102590568B1 (ko) * 2021-07-06 2023-10-18 한국과학기술연구원 이종 접합 반도체 기판, 그의 제조방법 및 그를 이용한 전자소자

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3071878D1 (en) * 1979-11-30 1987-02-05 Western Electric Co Fine-line solid state device
US4352239A (en) * 1980-04-17 1982-10-05 Fairchild Camera And Instrument Process for suppressing electromigration in conducting lines formed on integrated circuits by control of crystalline boundary orientation
US4742014A (en) * 1985-05-10 1988-05-03 Texas Instruments Incorporated Method of making metal contacts and interconnections for VLSI devices with copper as a primary conductor
US5019891A (en) * 1988-01-20 1991-05-28 Hitachi, Ltd. Semiconductor device and method of fabricating the same
JPH01302842A (ja) * 1988-05-31 1989-12-06 Nec Corp 多層配線構造の半導体装置
JP2680468B2 (ja) * 1989-07-01 1997-11-19 株式会社東芝 半導体装置および半導体装置の製造方法
DE69130595T2 (de) * 1990-07-06 1999-05-27 Tsubochi Kazuo Verfahren zur Herstellung einer Metallschicht
JP3131239B2 (ja) * 1991-04-25 2001-01-31 キヤノン株式会社 半導体回路装置用配線および半導体回路装置
JP2937613B2 (ja) * 1991-07-16 1999-08-23 日本電気株式会社 薄膜配線およびその製造方法

Also Published As

Publication number Publication date
KR0132402B1 (ko) 1998-04-15
DE69322233D1 (de) 1999-01-07
EP0725439B1 (de) 2006-01-18
EP0725439A3 (de) 1996-10-30
EP0594286A2 (de) 1994-04-27
EP0725439A2 (de) 1996-08-07
EP0594286B1 (de) 1998-11-25
DE69333966D1 (de) 2006-04-06
DE69333966T2 (de) 2006-09-14
KR940004755A (ko) 1994-03-15
EP0594286A3 (en) 1994-07-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: MOSELPATENT TRIERPATENT, 54290 TRIER

8328 Change in the person/name/address of the agent

Representative=s name: PATENTANWAELTE SERWE & DR. WAGNER, 54290 TRIER