DE69320574D1 - Statischer RAM-Speicher für Gattermatrixvorrichtungen - Google Patents
Statischer RAM-Speicher für GattermatrixvorrichtungenInfo
- Publication number
- DE69320574D1 DE69320574D1 DE69320574T DE69320574T DE69320574D1 DE 69320574 D1 DE69320574 D1 DE 69320574D1 DE 69320574 T DE69320574 T DE 69320574T DE 69320574 T DE69320574 T DE 69320574T DE 69320574 D1 DE69320574 D1 DE 69320574D1
- Authority
- DE
- Germany
- Prior art keywords
- ram memory
- static ram
- matrix devices
- gate matrix
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/012—Modifications of generator to improve response time or to decrease power consumption
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US95196592A | 1992-09-28 | 1992-09-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69320574D1 true DE69320574D1 (de) | 1998-10-01 |
DE69320574T2 DE69320574T2 (de) | 1999-03-25 |
Family
ID=25492405
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69320574T Expired - Fee Related DE69320574T2 (de) | 1992-09-28 | 1993-09-28 | Statischer RAM-Speicher für Gattermatrixvorrichtungen |
Country Status (6)
Country | Link |
---|---|
US (1) | US5438538A (de) |
EP (1) | EP0590591B1 (de) |
JP (1) | JPH06236688A (de) |
KR (1) | KR100299993B1 (de) |
DE (1) | DE69320574T2 (de) |
TW (1) | TW359818B (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5867443A (en) * | 1995-08-17 | 1999-02-02 | The United States Of America As Represented By The Secretary Of The Air Force | Shared bitline heterogeneous memory |
TW373175B (en) * | 1995-10-31 | 1999-11-01 | Matsushita Electric Mfg Corp | Data maintaining circuit |
US6144073A (en) * | 1999-05-13 | 2000-11-07 | Lucent Technologies Inc. | Monolithically-integrated static random access memory device |
JP2003132683A (ja) * | 2001-10-23 | 2003-05-09 | Hitachi Ltd | 半導体装置 |
JP4553185B2 (ja) | 2004-09-15 | 2010-09-29 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
JP2006196124A (ja) | 2005-01-14 | 2006-07-27 | Nec Electronics Corp | メモリセル及び半導体集積回路装置 |
JP4912016B2 (ja) * | 2005-05-23 | 2012-04-04 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
JP5456571B2 (ja) * | 2010-05-15 | 2014-04-02 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
JP5586038B2 (ja) * | 2013-07-25 | 2014-09-10 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2347968C3 (de) * | 1973-09-24 | 1980-06-26 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Assoziative Speicherzelle |
US3969708A (en) * | 1975-06-30 | 1976-07-13 | International Business Machines Corporation | Static four device memory cell |
US4131951A (en) * | 1976-05-17 | 1978-12-26 | Tokyo Shibaura Electric Co., Ltd. | High speed complementary MOS memory |
US4128773A (en) * | 1977-11-07 | 1978-12-05 | Hughes Aircraft Company | Volatile/non-volatile logic latch circuit |
US4460978A (en) * | 1981-11-19 | 1984-07-17 | Mostek Corporation | Nonvolatile static random access memory cell |
US4516225A (en) * | 1983-02-18 | 1985-05-07 | Advanced Micro Devices, Inc. | MOS Depletion load circuit |
US4636983A (en) * | 1984-12-20 | 1987-01-13 | Cypress Semiconductor Corp. | Memory array biasing circuit for high speed CMOS device |
JPH02268510A (ja) * | 1989-04-11 | 1990-11-02 | Seiko Epson Corp | ゲートアレイ装置によるバスデータ保持回路 |
JPH0499059A (ja) * | 1990-08-07 | 1992-03-31 | Seiko Epson Corp | ゲートアレイ用遅延回路 |
JPH0496369A (ja) * | 1990-08-13 | 1992-03-27 | Kawasaki Steel Corp | ゲートアレー型lsi |
-
1993
- 1993-09-25 KR KR1019930019704A patent/KR100299993B1/ko not_active IP Right Cessation
- 1993-09-27 JP JP5240103A patent/JPH06236688A/ja active Pending
- 1993-09-28 EP EP93115622A patent/EP0590591B1/de not_active Expired - Lifetime
- 1993-09-28 DE DE69320574T patent/DE69320574T2/de not_active Expired - Fee Related
- 1993-11-05 TW TW082109247A patent/TW359818B/zh not_active IP Right Cessation
-
1994
- 1994-09-26 US US08/312,165 patent/US5438538A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR100299993B1 (ko) | 2001-11-22 |
TW359818B (en) | 1999-06-01 |
EP0590591A3 (de) | 1995-03-15 |
US5438538A (en) | 1995-08-01 |
KR940008093A (ko) | 1994-04-28 |
JPH06236688A (ja) | 1994-08-23 |
EP0590591B1 (de) | 1998-08-26 |
DE69320574T2 (de) | 1999-03-25 |
EP0590591A2 (de) | 1994-04-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |