DE69307684T2 - Mikroprozessor mit verteilten Taktgebern - Google Patents

Mikroprozessor mit verteilten Taktgebern

Info

Publication number
DE69307684T2
DE69307684T2 DE69307684T DE69307684T DE69307684T2 DE 69307684 T2 DE69307684 T2 DE 69307684T2 DE 69307684 T DE69307684 T DE 69307684T DE 69307684 T DE69307684 T DE 69307684T DE 69307684 T2 DE69307684 T2 DE 69307684T2
Authority
DE
Germany
Prior art keywords
microprocessor
distributed clocks
clocks
distributed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69307684T
Other languages
English (en)
Other versions
DE69307684D1 (de
Inventor
Gopi Ganapathy
Stephen C Horne
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69307684D1 publication Critical patent/DE69307684D1/de
Publication of DE69307684T2 publication Critical patent/DE69307684T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
DE69307684T 1992-12-28 1993-11-22 Mikroprozessor mit verteilten Taktgebern Expired - Lifetime DE69307684T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/997,991 US5444407A (en) 1992-12-28 1992-12-28 Microprocessor with distributed clock generators

Publications (2)

Publication Number Publication Date
DE69307684D1 DE69307684D1 (de) 1997-03-06
DE69307684T2 true DE69307684T2 (de) 1997-07-10

Family

ID=25544642

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69307684T Expired - Lifetime DE69307684T2 (de) 1992-12-28 1993-11-22 Mikroprozessor mit verteilten Taktgebern

Country Status (4)

Country Link
US (1) US5444407A (de)
EP (1) EP0613075B1 (de)
JP (1) JPH06230849A (de)
DE (1) DE69307684T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004010096A1 (de) * 2004-02-27 2005-09-15 Endress + Hauser Gmbh + Co. Kg Verfahren zum Betreiben eines Feldgerätes der Automatisierungstechnik

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3732556B2 (ja) * 1995-07-26 2006-01-05 東芝マイクロエレクトロニクス株式会社 クロック供給回路
US6087872A (en) * 1995-09-11 2000-07-11 Advanced Micro Devices, Inc. Dynamic latch circuitry
US5777500A (en) * 1996-01-16 1998-07-07 Cyrix Corporation Multiple clock source generation with independently adjustable duty cycles
US5911063A (en) * 1996-07-10 1999-06-08 International Business Machines Corporation Method and apparatus for single phase clock distribution with minimal clock skew
US6185723B1 (en) * 1996-11-27 2001-02-06 International Business Machines Corporation Method for performing timing analysis of a clock-shaping circuit
US6014510A (en) * 1996-11-27 2000-01-11 International Business Machines Corporation Method for performing timing analysis of a clock circuit
JP3094984B2 (ja) * 1998-03-13 2000-10-03 日本電気株式会社 パルス発生回路
US6069514A (en) * 1998-04-23 2000-05-30 Sun Microsystems, Inc. Using asynchronous FIFO control rings for synchronous systems
US6578155B1 (en) * 2000-03-16 2003-06-10 International Business Machines Corporation Data processing system with adjustable clocks for partitioned synchronous interfaces
US7178138B2 (en) * 2001-01-24 2007-02-13 Texas Instruments Incorporated Method and tool for verification of algorithms ported from one instruction set architecture to another
US6750689B2 (en) * 2001-03-29 2004-06-15 Intel Corporation Method and apparatus for correcting a clock duty cycle in a clock distribution network
US6873318B1 (en) 2001-05-23 2005-03-29 National Semiconductor Corporation Method and apparatus for addressing beat patterns in an integrated video display system
US6583659B1 (en) * 2002-02-08 2003-06-24 Pericom Semiconductor Corp. Reduced clock-skew in a multi-output clock driver by selective shorting together of clock pre-outputs
US7248848B2 (en) * 2004-06-30 2007-07-24 Matthews Phillip M Communication apparatus including dual timer units
TW200630772A (en) * 2005-02-24 2006-09-01 Sunplus Technology Co Ltd Clock adjusting method and electronics device with clock adjusting function
US7489176B2 (en) * 2006-04-28 2009-02-10 Rambus Inc. Clock distribution circuit
US7643591B2 (en) * 2006-07-26 2010-01-05 International Business Machines Corproation Transition balancing for noise reduction /Di/Dt reduction during design, synthesis, and physical design
US7743270B2 (en) * 2006-09-11 2010-06-22 International Business Machines Corporation Assigning clock arrival time for noise reduction
US20080270965A1 (en) * 2007-04-24 2008-10-30 Craig Jesse E Method of reducing peak power consumption in an integrated circuit system
US7823107B2 (en) * 2007-10-19 2010-10-26 International Business Machines Corporation Transition balancing for noise reduction/Di/Dt reduction during design, synthesis, and physical design
US20090172627A1 (en) * 2007-12-28 2009-07-02 International Business Machines Corporation Design Structure for a Clock System for a Plurality of Functional Blocks
US9319037B2 (en) 2014-02-03 2016-04-19 Advanced Micro Devices, Inc. Self-adjusting clock doubler and integrated circuit clock distribution system using same

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3921079A (en) * 1974-05-13 1975-11-18 Gte Automatic Electric Lab Inc Multi-phase clock distribution system
US4021740A (en) * 1976-01-30 1977-05-03 Communications Satellite Corporation (Comsat) Sinewave clock driver with adjustable delay
US4291242A (en) * 1979-05-21 1981-09-22 Motorola, Inc. Driver circuit for use in an output buffer
JPS6182525A (ja) * 1984-09-29 1986-04-26 Toshiba Corp 半導体集積回路装置
JPS63110811A (ja) * 1986-10-28 1988-05-16 Mitsubishi Electric Corp クロツクジエネレ−タ
JPS63238714A (ja) * 1986-11-26 1988-10-04 Hitachi Ltd クロック供給システム
US4810908A (en) * 1986-12-01 1989-03-07 Hirokazu Suzuki Semiconductor logic circuit comprising clock driver and clocked logic circuit
US5133064A (en) * 1987-04-27 1992-07-21 Hitachi, Ltd. Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
JPH0815210B2 (ja) * 1987-06-04 1996-02-14 日本電気株式会社 マスタスライス方式集積回路
JPS6467940A (en) * 1987-09-08 1989-03-14 Mitsubishi Electric Corp Semiconductor integrated circuit
JPH07114348B2 (ja) * 1987-12-11 1995-12-06 日本電気株式会社 論理回路
US4816700A (en) * 1987-12-16 1989-03-28 Intel Corporation Two-phase non-overlapping clock generator
JPH01251738A (ja) * 1988-03-31 1989-10-06 Toshiba Corp スタンダードセル
JPH07120225B2 (ja) * 1988-04-15 1995-12-20 富士通株式会社 半導体回路装置
JPH0229124A (ja) * 1988-07-19 1990-01-31 Toshiba Corp スタンダードセル
JPH0736422B2 (ja) * 1988-08-19 1995-04-19 株式会社東芝 クロック供給回路
JPH02105910A (ja) * 1988-10-14 1990-04-18 Hitachi Ltd 論理集積回路
US4965471A (en) * 1989-06-26 1990-10-23 Eastman Kodak Company BI-CMOS clock driver with reduced crossover current
US5001731A (en) * 1989-10-02 1991-03-19 Motorola, Inc. Method and apparatus for eliminating clockskew race condition errors
US5058132A (en) * 1989-10-26 1991-10-15 National Semiconductor Corporation Clock distribution system and technique
JP2756325B2 (ja) * 1989-12-07 1998-05-25 株式会社日立製作所 クロック供給回路
US5079440A (en) * 1990-03-15 1992-01-07 Intel Corporation Apparatus for generating computer clock pulses
US5077676A (en) * 1990-03-30 1991-12-31 International Business Machines Corporation Reducing clock skew in large-scale integrated circuits
US5073730A (en) * 1990-04-23 1991-12-17 International Business Machines Corporation Current transient reduction for vlsi chips
US5120989A (en) * 1991-02-04 1992-06-09 The United States Of America As Represented By The Secretary Of The Army Simplified clock distribution in electronic systems
US5153450A (en) * 1991-07-16 1992-10-06 Samsung Semiconductor, Inc. Programmable output drive circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004010096A1 (de) * 2004-02-27 2005-09-15 Endress + Hauser Gmbh + Co. Kg Verfahren zum Betreiben eines Feldgerätes der Automatisierungstechnik

Also Published As

Publication number Publication date
DE69307684D1 (de) 1997-03-06
US5444407A (en) 1995-08-22
JPH06230849A (ja) 1994-08-19
EP0613075A1 (de) 1994-08-31
EP0613075B1 (de) 1997-01-22

Similar Documents

Publication Publication Date Title
DE69307684D1 (de) Mikroprozessor mit verteilten Taktgebern
NO920137L (no) Blindnaglemutter med trekkdor
DE69306054T2 (de) Weltzeituhr
FI933455A0 (fi) Substituerade kvaevehaltiga heterocykliska foereningar
DE69425086D1 (de) Mikroprozessor
DE69308452T2 (de) Getriebeeinheit
DE69328626T2 (de) Fotokopierer mit kodierungsfunktion
NO924621D0 (no) Roertraktor
DE69319953D1 (de) Elektronisches analoges Uhrwerk mit mehreren Funktionen
DE69320013T2 (de) Magneto-pneumatisches Zeitglied
DE69402787T2 (de) Mikroprozessor mit Taktsteuerungseinrichtung
DE9321214U1 (de) Verzierungselement
DE69324681D1 (de) Entproteinisierung mit azlacton-gekoppelten funktionsträgern
FI921457A (fi) Svetsanordning foer roer
ATA151292A (de) Beschlag
DE69231552D1 (de) Komplex Kristall
DE9210907U1 (de) Zeitschalter
BR9100599A (pt) Engrenagem autocompensadora
SE9301427D0 (sv) Laasbart laasvred
DE9218546U1 (de) Lünette
ATA151392A (de) Beschlag
KR930005957U (ko) 재초기의 날
TH9418EX (th) นาฬิกา
BR9105072A (pt) Varre lava
KR940014421U (ko) 책상겸용 의자

Legal Events

Date Code Title Description
8364 No opposition during term of opposition