DE69226937D1 - Prüfverfahren für Leiterplatten - Google Patents
Prüfverfahren für LeiterplattenInfo
- Publication number
- DE69226937D1 DE69226937D1 DE69226937T DE69226937T DE69226937D1 DE 69226937 D1 DE69226937 D1 DE 69226937D1 DE 69226937 T DE69226937 T DE 69226937T DE 69226937 T DE69226937 T DE 69226937T DE 69226937 D1 DE69226937 D1 DE 69226937D1
- Authority
- DE
- Germany
- Prior art keywords
- printed circuit
- circuit boards
- test methods
- test
- methods
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/824,617 US5323108A (en) | 1992-01-23 | 1992-01-23 | Method for generating functional tests for printed circuit boards based on pattern matching of models |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69226937D1 true DE69226937D1 (de) | 1998-10-15 |
DE69226937T2 DE69226937T2 (de) | 1999-02-04 |
Family
ID=25241870
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69226937T Expired - Fee Related DE69226937T2 (de) | 1992-01-23 | 1992-10-22 | Prüfverfahren für Leiterplatten |
Country Status (4)
Country | Link |
---|---|
US (1) | US5323108A (de) |
EP (1) | EP0552532B1 (de) |
JP (1) | JP3174182B2 (de) |
DE (1) | DE69226937T2 (de) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5504432A (en) * | 1993-08-31 | 1996-04-02 | Hewlett-Packard Company | System and method for detecting short, opens and connected pins on a printed circuit board using automatic test equipment |
US5629878A (en) * | 1993-10-07 | 1997-05-13 | International Business Machines Corporation | Test planning and execution models for generating non-redundant test modules for testing a computer system |
US5617531A (en) * | 1993-11-02 | 1997-04-01 | Motorola, Inc. | Data Processor having a built-in internal self test controller for testing a plurality of memories internal to the data processor |
JP3212228B2 (ja) * | 1994-10-17 | 2001-09-25 | 富士通株式会社 | 試験プログラム作成装置における試験プログラム自動作成方法 |
FR2727211B1 (fr) * | 1994-11-21 | 1997-01-24 | Sextant Avionique | Procede de test d'un equipement electronique |
US5590136A (en) * | 1995-01-25 | 1996-12-31 | Hewlett-Packard Co | Method for creating an in-circuit test for an electronic device |
JP3805888B2 (ja) * | 1998-03-20 | 2006-08-09 | 株式会社アドバンテスト | Ic試験装置 |
JP4047975B2 (ja) * | 1998-07-07 | 2008-02-13 | 株式会社アドバンテスト | 半導体デバイス試験装置及び半導体デバイス試験方法 |
US6243853B1 (en) * | 1998-10-02 | 2001-06-05 | Agilent Technologies, Inc. | Development of automated digital libraries for in-circuit testing of printed curcuit boards |
US6266787B1 (en) * | 1998-10-09 | 2001-07-24 | Agilent Technologies, Inc. | Method and apparatus for selecting stimulus locations during limited access circuit test |
US6467051B1 (en) * | 1998-10-09 | 2002-10-15 | Agilent Technologies, Inc. | Method and apparatus for selecting test point nodes of a group of components having both accessible and inaccessible nodes for limited access circuit test |
JP3737899B2 (ja) * | 1999-01-29 | 2006-01-25 | 日東電工株式会社 | 半導体素子の検査方法およびそのための異方導電性フィルム |
JP2000315222A (ja) * | 1999-04-30 | 2000-11-14 | Matsushita Electric Ind Co Ltd | 集積回路装置の設計用データベース及び集積回路装置の設計方法 |
US6823486B2 (en) * | 2000-06-05 | 2004-11-23 | Fujitsu Limited | Automatic test pattern generation for functional register transfer level circuits using assignment decision diagrams |
US7562350B2 (en) * | 2000-12-15 | 2009-07-14 | Ricoh Company, Ltd. | Processing system and method using recomposable software |
KR100729647B1 (ko) * | 2001-01-13 | 2007-06-18 | 주식회사 푸르던텍 | 보드 테스트 시스템 |
EP1331487A1 (de) * | 2002-01-29 | 2003-07-30 | AMI Semiconductor Belgium BVBA | Vorrichtung und Verfahren zur Erzeugung von Testprogrammen für integrierte Schaltungen |
US7912668B2 (en) | 2002-06-24 | 2011-03-22 | Analog Devices, Inc. | System for determining the true electrical characteristics of a device |
US7890284B2 (en) | 2002-06-24 | 2011-02-15 | Analog Devices, Inc. | Identification system and method for recognizing any one of a number of different types of devices |
US7321999B2 (en) * | 2004-10-05 | 2008-01-22 | Verigy (Singapore) Pte. Ltd. | Methods and apparatus for programming and operating automated test equipment |
US7376876B2 (en) * | 2004-12-23 | 2008-05-20 | Honeywell International Inc. | Test program set generation tool |
US7478281B2 (en) | 2005-06-06 | 2009-01-13 | Denniston William B | System and methods for functional testing of embedded processor-based systems |
CN102338854B (zh) * | 2010-07-27 | 2015-04-15 | 迈普通信技术股份有限公司 | 电路板测试用例生成系统及方法 |
CN109444715A (zh) * | 2018-11-23 | 2019-03-08 | 格力电器(武汉)有限公司 | 一种组合测试装置 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4380070A (en) * | 1979-11-20 | 1983-04-12 | Lockheed Corporation | Automatic circuit identifier |
US4500993A (en) * | 1980-06-17 | 1985-02-19 | Zehntel, Inc. | In-circuit digital tester for testing microprocessor boards |
CA1163721A (en) * | 1980-08-18 | 1984-03-13 | Milan Slamka | Apparatus for the dynamic in-circuit testing of electronic digital circuit elements |
FR2531230A1 (fr) * | 1982-07-27 | 1984-02-03 | Rank Xerox Sa | Ensemble destine au test automatique centralise de circuits imprimes et procede de test de circuits a microprocesseur faisant application de cet ensemble |
US4829520A (en) * | 1987-03-16 | 1989-05-09 | American Telephone And Telegraph Company, At&T Bell Laboratories | In-place diagnosable electronic circuit board |
GB8805120D0 (en) * | 1988-03-03 | 1988-03-30 | Hewlett Packard Co | Testing digital circuits |
EP0347162A3 (de) * | 1988-06-14 | 1990-09-12 | Tektronix, Inc. | Einrichtung und Verfahren zum Steuern von Datenflussprozessen durch erzeugte Befehlsfolgen |
US5032789A (en) * | 1989-06-19 | 1991-07-16 | Hewlett-Packard Company | Modular/concurrent board tester |
FR2648916B1 (fr) * | 1989-06-27 | 1991-09-06 | Cit Alcatel | Agencement de test de cartes a circuit imprime et son application au test de cartes a circuit imprime formant un equipement de multiplexage-demultiplexage de signaux numeriques |
US5004978A (en) * | 1990-03-29 | 1991-04-02 | Hewlett-Packard Company | Method for regenerating in-circuit test sequences for circuit board components |
-
1992
- 1992-01-23 US US07/824,617 patent/US5323108A/en not_active Expired - Fee Related
- 1992-10-22 EP EP92309688A patent/EP0552532B1/de not_active Expired - Lifetime
- 1992-10-22 DE DE69226937T patent/DE69226937T2/de not_active Expired - Fee Related
-
1993
- 1993-01-25 JP JP00985493A patent/JP3174182B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5323108A (en) | 1994-06-21 |
EP0552532A3 (en) | 1995-03-22 |
JP3174182B2 (ja) | 2001-06-11 |
EP0552532B1 (de) | 1998-09-09 |
JPH0618635A (ja) | 1994-01-28 |
EP0552532A2 (de) | 1993-07-28 |
DE69226937T2 (de) | 1999-02-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69226937D1 (de) | Prüfverfahren für Leiterplatten | |
DE69611020D1 (de) | Prepreg für Leiterplatten | |
DE69017582D1 (de) | Zwischenverbindungsvorrichtung für Leiterplatten. | |
DE69400677D1 (de) | Verbinderanordnung für gedruckte Leiterplatte | |
DE69209921D1 (de) | Randverbinder für Leiterkarten | |
DE69431844D1 (de) | Testgerät für gedruckte schaltungen | |
DE69421658D1 (de) | Auslegungsmethode für mehrlagige gedruckte Schaltung | |
DE69516042D1 (de) | Winkelverbinder für Leiterplatten | |
DE69402590D1 (de) | Verriegelungs- und Versteifungsvorrichtung für Leiterplatte | |
DE69204754D1 (de) | Klemmleiste für gedruckte Leiterplatten. | |
DE69306178D1 (de) | Ablatives Verfahren für die Leiterplattentechnologie | |
DE69400238D1 (de) | Befestigungsvorrichtung für Leiterplatten | |
DE69406581D1 (de) | Gedruckte Schaltungsplatten | |
DE69011958D1 (de) | Verbindungszusammenbau für gedruckte Schaltungskarten. | |
IL73726A0 (en) | Printed circuit board test fixture | |
DE69214581D1 (de) | Leiterplatte für gedruckte Schaltungen | |
KR880700276A (ko) | 인쇄회로기판의 수리 및 검사 시스템(System for Testing and Repairing Printed Circuit Boards) | |
DE69508127D1 (de) | Markierungssystem für Leiterplatten | |
DE69325300D1 (de) | Leiterplatte für ein optisches Element | |
DE59206942D1 (de) | Anschlussklemmleiste für gedruckte Leiterplatten | |
DE68922664D1 (de) | Ausrichtungssystem für gedruckte Schaltungskarten. | |
KR960009581U (ko) | 검사용 인쇄회로 기판 | |
GB2215064B (en) | Testing printed circuit boards | |
KR920021906U (ko) | 회로기판 회로 검사 지그 | |
KR950029030U (ko) | 인쇄회로기판의 위치 고정장치 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: AGILENT TECHNOLOGIES, INC. (N.D.GES.D.STAATES DELA |
|
8339 | Ceased/non-payment of the annual fee |