DE69225495D1 - Verfahren zur konstruktion von mehrschichtigen schaltungen, strukturen mit personalisierungsmerkmalen und darin verwendete komponenten - Google Patents

Verfahren zur konstruktion von mehrschichtigen schaltungen, strukturen mit personalisierungsmerkmalen und darin verwendete komponenten

Info

Publication number
DE69225495D1
DE69225495D1 DE69225495T DE69225495T DE69225495D1 DE 69225495 D1 DE69225495 D1 DE 69225495D1 DE 69225495 T DE69225495 T DE 69225495T DE 69225495 T DE69225495 T DE 69225495T DE 69225495 D1 DE69225495 D1 DE 69225495D1
Authority
DE
Germany
Prior art keywords
panel
terminals
circuit
contacts
conductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69225495T
Other languages
English (en)
Other versions
DE69225495T2 (de
Inventor
Thomas Distefano
Igor Khandros
Gary Grube
Scott Ehrenberg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Adeia Semiconductor Solutions LLC
Original Assignee
Tessera LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/816,634 external-priority patent/US5282312A/en
Priority claimed from US07/815,401 external-priority patent/US5367764A/en
Application filed by Tessera LLC filed Critical Tessera LLC
Publication of DE69225495D1 publication Critical patent/DE69225495D1/de
Application granted granted Critical
Publication of DE69225495T2 publication Critical patent/DE69225495T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50Fixed connections
    • H01R12/51Fixed connections for rigid printed circuits or like structures
    • H01R12/52Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
    • H01R12/523Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures by an interconnection through aligned holes in the boards or multilayer board
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0286Programmable, customizable or modifiable circuits
    • H05K1/0287Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0286Programmable, customizable or modifiable circuits
    • H05K1/029Programmable, customizable or modifiable circuits having a programmable lay-out, i.e. adapted for choosing between a few possibilities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0183Dielectric layers
    • H05K2201/0195Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0302Properties and characteristics in general
    • H05K2201/0305Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09609Via grid, i.e. two-dimensional array of vias or holes in a single plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09945Universal aspects, e.g. universal inner layers or via grid, or anisotropic interposer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10666Plated through-hole for surface mounting on PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17Post-manufacturing processes
    • H05K2203/175Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Combinations Of Printed Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
DE69225495T 1991-12-31 1992-12-30 Verfahren zur konstruktion von mehrschichtigen schaltungen, strukturen mit personalisierungsmerkmalen und darin verwendete komponenten Expired - Fee Related DE69225495T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US07/816,634 US5282312A (en) 1991-12-31 1991-12-31 Multi-layer circuit construction methods with customization features
US07/815,401 US5367764A (en) 1991-12-31 1991-12-31 Method of making a multi-layer circuit assembly
PCT/US1992/011395 WO1993013637A1 (en) 1991-12-31 1992-12-30 Multi-layer circuit construction methods and structures with customization features and components for use therein

Publications (2)

Publication Number Publication Date
DE69225495D1 true DE69225495D1 (de) 1998-06-18
DE69225495T2 DE69225495T2 (de) 1998-10-08

Family

ID=27123947

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69225495T Expired - Fee Related DE69225495T2 (de) 1991-12-31 1992-12-30 Verfahren zur konstruktion von mehrschichtigen schaltungen, strukturen mit personalisierungsmerkmalen und darin verwendete komponenten
DE69233259T Expired - Fee Related DE69233259T2 (de) 1991-12-31 1992-12-30 Mehrlageschaltungsherstellung und Stuktur mit Anpassungsmöglichkeit und Komponenten dafür

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69233259T Expired - Fee Related DE69233259T2 (de) 1991-12-31 1992-12-30 Mehrlageschaltungsherstellung und Stuktur mit Anpassungsmöglichkeit und Komponenten dafür

Country Status (6)

Country Link
EP (2) EP0834921B1 (de)
JP (3) JP3472299B2 (de)
AT (2) ATE255276T1 (de)
AU (1) AU3429493A (de)
DE (2) DE69225495T2 (de)
WO (1) WO1993013637A1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2820108B2 (ja) * 1996-03-13 1998-11-05 日本電気株式会社 電子部品の実装構造およびその製造方法
US6056557A (en) * 1998-04-08 2000-05-02 Thomas & Betts International, Inc. Board to board interconnect
EP2086299A1 (de) 1999-06-02 2009-08-05 Ibiden Co., Ltd. Mehrschichtige bestückte Leiterplatte und Verfahren zur Herstellung einer mehrschichtigen bestückten Leiterplatte
JP2006041378A (ja) * 2004-07-29 2006-02-09 Toshiba Corp 多層プリント配線板、多層プリント配線板の製造方法および電子機器
JP2006066458A (ja) * 2004-08-24 2006-03-09 Sharp Corp 多層プリント配線板及び多層プリント配線板の製造方法
JP2007129124A (ja) * 2005-11-07 2007-05-24 Matsushita Electric Ind Co Ltd 多層プリント配線基板及びその製造方法
JP5332731B2 (ja) * 2009-03-02 2013-11-06 富士通株式会社 電磁界シミュレータ及び電磁界シミュレーション装置
JP5581828B2 (ja) * 2010-06-09 2014-09-03 富士通株式会社 積層回路基板および基板製造方法
JP5633256B2 (ja) * 2010-09-02 2014-12-03 株式会社村田製作所 部品内蔵基板の製造方法
WO2016158109A1 (ja) * 2015-03-27 2016-10-06 京セラ株式会社 撮像用部品およびこれを備える撮像モジュール
DE102015013838B3 (de) * 2015-10-23 2017-02-16 Technische Universität Dresden Verfahren zur Herstellung von mechanisch-elektrischen Fügeverbindungen zwischen mindestens zwei elektrisch leitenden Verbunden eines Verbundsystems und multifunktionales Verbundsystem
US10349520B2 (en) * 2017-06-28 2019-07-09 Catlam, Llc Multi-layer circuit board using interposer layer and conductive paste
WO2019204686A1 (en) 2018-04-19 2019-10-24 The Research Foundation For The State University Of New York Solderless circuit connector
US20190335593A1 (en) * 2018-04-26 2019-10-31 Daeduck Electronics Co., Ltd. Method of manufacturing the printed circuit board
CN113670187B (zh) * 2021-09-06 2022-09-20 宁波韧和科技有限公司 兼具高安全性与高探测量程的电容式弹性应变传感器及其制备方法

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US3546775A (en) * 1965-10-22 1970-12-15 Sanders Associates Inc Method of making multi-layer circuit
US3616532A (en) * 1970-02-02 1971-11-02 Sperry Rand Corp Multilayer printed circuit electrical interconnection device
US3775844A (en) * 1970-06-25 1973-12-04 Bunker Ramo Method of fabricating a multiwafer electrical circuit structure
US3859711A (en) * 1973-03-20 1975-01-14 Ibm Method of detecting misregistration of internal layers of a multilayer printed circuit panel
FR2312172A1 (fr) * 1975-05-22 1976-12-17 Ibm Procede de fabrication d'ensembles de circuits integres
US4383363A (en) * 1977-09-01 1983-05-17 Sharp Kabushiki Kaisha Method of making a through-hole connector
US4211603A (en) * 1978-05-01 1980-07-08 Tektronix, Inc. Multilayer circuit board construction and method
DE2902002A1 (de) * 1979-01-19 1980-07-31 Gerhard Krause Dreidimensional integrierte elektronische schaltungen
WO1985002751A1 (en) * 1983-12-15 1985-06-20 Laserpath Corporation Partially aligned multi-layered circuitry
ATE56310T1 (de) * 1984-06-27 1990-09-15 Contraves Ag Verfahren zur herstellung eines basismaterials fuer eine hybridschaltung.
DE3685647T2 (de) * 1985-07-16 1993-01-07 Nippon Telegraph & Telephone Verbindungskontakte zwischen substraten und verfahren zur herstellung derselben.
US4727633A (en) * 1985-08-08 1988-03-01 Tektronix, Inc. Method of securing metallic members together
US4667404A (en) * 1985-09-30 1987-05-26 Microelectronics Center Of North Carolina Method of interconnecting wiring planes
DE3810486A1 (de) * 1988-03-28 1989-10-19 Kaleto Ag Verfahren zum herstellen kundenspezifischer elektrischer schaltungen, insbesondere gedruckter schaltungen
US5031308A (en) * 1988-12-29 1991-07-16 Japan Radio Co., Ltd. Method of manufacturing multilayered printed-wiring-board
US5089880A (en) * 1989-06-07 1992-02-18 Amdahl Corporation Pressurized interconnection system for semiconductor chips
US4954878A (en) * 1989-06-29 1990-09-04 Digital Equipment Corp. Method of packaging and powering integrated circuit chips and the chip assembly formed thereby
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Also Published As

Publication number Publication date
DE69233259D1 (de) 2004-01-08
JPH08500467A (ja) 1996-01-16
ATE255276T1 (de) 2003-12-15
EP0834921A2 (de) 1998-04-08
EP0619935A4 (de) 1995-03-22
ATE166202T1 (de) 1998-05-15
EP0834921A3 (de) 1998-08-26
EP0619935B1 (de) 1998-05-13
JP3774461B2 (ja) 2006-05-17
AU3429493A (en) 1993-07-28
JP2002305380A (ja) 2002-10-18
JP3472299B2 (ja) 2003-12-02
JP3547731B2 (ja) 2004-07-28
EP0834921B1 (de) 2003-11-26
JP2004140412A (ja) 2004-05-13
EP0619935A1 (de) 1994-10-19
WO1993013637A1 (en) 1993-07-08
DE69225495T2 (de) 1998-10-08
DE69233259T2 (de) 2004-08-26

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