DE69132018T2 - Rechner mit Vorausholungs-Cache-Speicher - Google Patents
Rechner mit Vorausholungs-Cache-SpeicherInfo
- Publication number
- DE69132018T2 DE69132018T2 DE69132018T DE69132018T DE69132018T2 DE 69132018 T2 DE69132018 T2 DE 69132018T2 DE 69132018 T DE69132018 T DE 69132018T DE 69132018 T DE69132018 T DE 69132018T DE 69132018 T2 DE69132018 T2 DE 69132018T2
- Authority
- DE
- Germany
- Prior art keywords
- cache
- calculator
- cache cache
- cache calculator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/383—Operand prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6028—Prefetching based on hints or prefetch instructions
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2155776A JPH0452741A (ja) | 1990-06-14 | 1990-06-14 | キャッシュメモリ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69132018D1 DE69132018D1 (de) | 2000-04-13 |
DE69132018T2 true DE69132018T2 (de) | 2000-09-14 |
Family
ID=15613158
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69132018T Expired - Fee Related DE69132018T2 (de) | 1990-06-14 | 1991-06-12 | Rechner mit Vorausholungs-Cache-Speicher |
Country Status (4)
Country | Link |
---|---|
US (1) | US5371865A (de) |
EP (1) | EP0463770B1 (de) |
JP (1) | JPH0452741A (de) |
DE (1) | DE69132018T2 (de) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0551090B1 (de) * | 1992-01-06 | 1999-08-04 | Hitachi, Ltd. | Rechner mit einer Parallelverarbeitungsfähigkeit |
JPH07271744A (ja) * | 1994-03-31 | 1995-10-20 | Matsushita Electric Ind Co Ltd | 並列計算機 |
US5592392A (en) * | 1994-11-22 | 1997-01-07 | Mentor Graphics Corporation | Integrated circuit design apparatus with extensible circuit elements |
US5832533A (en) * | 1995-01-04 | 1998-11-03 | International Business Machines Corporation | Method and system for addressing registers in a data processing unit in an indexed addressing mode |
US6314561B1 (en) * | 1995-04-12 | 2001-11-06 | International Business Machines Corporation | Intelligent cache management mechanism |
EP0741356A1 (de) * | 1995-05-05 | 1996-11-06 | Rockwell International Corporation | Cachearchitektur mit einer Datenvorladeeinheit |
US5943691A (en) * | 1995-12-27 | 1999-08-24 | Sun Microsystems, Inc. | Determination of array padding using collision vectors |
US5889959A (en) * | 1996-01-05 | 1999-03-30 | Unisys Corporation | Fast write initialization method and system for loading channel adapter microcode |
US5893142A (en) * | 1996-11-14 | 1999-04-06 | Motorola Inc. | Data processing system having a cache and method therefor |
US5872990A (en) * | 1997-01-07 | 1999-02-16 | International Business Machines Corporation | Reordering of memory reference operations and conflict resolution via rollback in a multiprocessing environment |
US5958068A (en) * | 1997-04-14 | 1999-09-28 | International Business Machines Corporation | Cache array defect functional bypassing using repair mask |
US6003115A (en) * | 1997-07-29 | 1999-12-14 | Quarterdeck Corporation | Method and apparatus for predictive loading of a cache |
US6151662A (en) * | 1997-12-02 | 2000-11-21 | Advanced Micro Devices, Inc. | Data transaction typing for improved caching and prefetching characteristics |
US6240490B1 (en) | 1998-07-20 | 2001-05-29 | International Business Machines Corporation | Comprehensive multilevel cache preloading mechanism in a multiprocessing simulation environment |
US6742112B1 (en) * | 1999-12-29 | 2004-05-25 | Intel Corporation | Lookahead register value tracking |
US7000093B2 (en) * | 2001-12-19 | 2006-02-14 | Intel Corporation | Cellular automaton processing microprocessor prefetching data in neighborhood buffer |
WO2003091972A1 (en) * | 2002-04-26 | 2003-11-06 | Telefonaktiebolaget Lm Ericsson | Memory access register file |
JP4045296B2 (ja) * | 2004-03-24 | 2008-02-13 | 松下電器産業株式会社 | キャッシュメモリ及びその制御方法 |
JP4690016B2 (ja) | 2004-11-11 | 2011-06-01 | パナソニック株式会社 | 画像圧縮伸長装置 |
JP2010191754A (ja) * | 2009-02-19 | 2010-09-02 | Mitsubishi Electric Corp | キャッシュ記憶装置 |
JP5446464B2 (ja) * | 2009-05-26 | 2014-03-19 | 富士通セミコンダクター株式会社 | 情報処理システム及びデータ転送方法 |
WO2011010183A1 (en) * | 2009-07-20 | 2011-01-27 | Freescale Semiconductor, Inc. | Signal processing system and integrated circuit comprising a prefetch module and method therefor |
US10114755B2 (en) * | 2013-06-14 | 2018-10-30 | Nvidia Corporation | System, method, and computer program product for warming a cache for a task launch |
JP6316593B2 (ja) * | 2014-01-07 | 2018-04-25 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1515376A (en) * | 1975-07-09 | 1978-06-21 | Int Computers Ltd | Data storage systems |
JPS5263038A (en) * | 1975-10-01 | 1977-05-25 | Hitachi Ltd | Data processing device |
US4583165A (en) * | 1982-06-30 | 1986-04-15 | International Business Machines Corporation | Apparatus and method for controlling storage access in a multilevel storage system |
US4888679A (en) * | 1988-01-11 | 1989-12-19 | Digital Equipment Corporation | Method and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elements |
US4926323A (en) * | 1988-03-03 | 1990-05-15 | Advanced Micro Devices, Inc. | Streamlined instruction processor |
-
1990
- 1990-06-14 JP JP2155776A patent/JPH0452741A/ja active Pending
-
1991
- 1991-06-12 EP EP91305317A patent/EP0463770B1/de not_active Expired - Lifetime
- 1991-06-12 DE DE69132018T patent/DE69132018T2/de not_active Expired - Fee Related
- 1991-06-14 US US07/715,932 patent/US5371865A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69132018D1 (de) | 2000-04-13 |
US5371865A (en) | 1994-12-06 |
EP0463770A2 (de) | 1992-01-02 |
EP0463770A3 (en) | 1992-10-07 |
EP0463770B1 (de) | 2000-03-08 |
JPH0452741A (ja) | 1992-02-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |