DE68921869D1 - Ein-/Ausgabebuscachespeicherung. - Google Patents
Ein-/Ausgabebuscachespeicherung.Info
- Publication number
- DE68921869D1 DE68921869D1 DE68921869T DE68921869T DE68921869D1 DE 68921869 D1 DE68921869 D1 DE 68921869D1 DE 68921869 T DE68921869 T DE 68921869T DE 68921869 T DE68921869 T DE 68921869T DE 68921869 D1 DE68921869 D1 DE 68921869D1
- Authority
- DE
- Germany
- Prior art keywords
- cache storage
- bus cache
- bus
- storage
- cache
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Information Transfer Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US29771289A | 1989-01-13 | 1989-01-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68921869D1 true DE68921869D1 (de) | 1995-04-27 |
DE68921869T2 DE68921869T2 (de) | 1995-10-12 |
Family
ID=23147428
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68921869T Expired - Fee Related DE68921869T2 (de) | 1989-01-13 | 1989-12-11 | Ein-/Ausgabebuscachespeicherung. |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0377971B1 (de) |
JP (1) | JPH02226448A (de) |
DE (1) | DE68921869T2 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5842041A (en) * | 1994-05-20 | 1998-11-24 | Advanced Micro Devices, Inc. | Computer system employing a control signal indicative of whether address is within address space of devices on processor local bus |
JP2748862B2 (ja) * | 1994-06-15 | 1998-05-13 | 日本電気株式会社 | バスインタフェースアダプタ |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4481573A (en) * | 1980-11-17 | 1984-11-06 | Hitachi, Ltd. | Shared virtual address translation unit for a multiprocessor system |
-
1989
- 1989-12-11 EP EP89312897A patent/EP0377971B1/de not_active Expired - Lifetime
- 1989-12-11 DE DE68921869T patent/DE68921869T2/de not_active Expired - Fee Related
- 1989-12-28 JP JP1338898A patent/JPH02226448A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0526218B2 (de) | 1993-04-15 |
JPH02226448A (ja) | 1990-09-10 |
EP0377971A2 (de) | 1990-07-18 |
EP0377971A3 (de) | 1991-03-20 |
EP0377971B1 (de) | 1995-03-22 |
DE68921869T2 (de) | 1995-10-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |