DE69129685D1 - Taktverteilungssystem - Google Patents

Taktverteilungssystem

Info

Publication number
DE69129685D1
DE69129685D1 DE69129685T DE69129685T DE69129685D1 DE 69129685 D1 DE69129685 D1 DE 69129685D1 DE 69129685 T DE69129685 T DE 69129685T DE 69129685 T DE69129685 T DE 69129685T DE 69129685 D1 DE69129685 D1 DE 69129685D1
Authority
DE
Germany
Prior art keywords
distribution system
clock distribution
clock
distribution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69129685T
Other languages
English (en)
Other versions
DE69129685T2 (de
Inventor
Noriaki Ohuchi
Akio Morimoto
Hiroshi Nakaide
Fumihiko Saito
Hiroyuki Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69129685D1 publication Critical patent/DE69129685D1/de
Publication of DE69129685T2 publication Critical patent/DE69129685T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
DE69129685T 1990-08-31 1991-08-30 Taktverteilungssystem Expired - Fee Related DE69129685T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2231494A JP2546048B2 (ja) 1990-08-31 1990-08-31 クロック分配方式

Publications (2)

Publication Number Publication Date
DE69129685D1 true DE69129685D1 (de) 1998-08-06
DE69129685T2 DE69129685T2 (de) 1998-12-24

Family

ID=16924371

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69129685T Expired - Fee Related DE69129685T2 (de) 1990-08-31 1991-08-30 Taktverteilungssystem

Country Status (5)

Country Link
US (1) US5274677A (de)
EP (1) EP0476394B1 (de)
JP (1) JP2546048B2 (de)
CA (1) CA2050194C (de)
DE (1) DE69129685T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5570054A (en) * 1994-09-26 1996-10-29 Hitachi Micro Systems, Inc. Method and apparatus for adaptive clock deskewing
US5570053A (en) * 1994-09-26 1996-10-29 Hitachi Micro Systems, Inc. Method and apparatus for averaging clock skewing in clock distribution network
US5661427A (en) * 1994-10-05 1997-08-26 Micro Linear Corporation Series terminated clock deskewing apparatus
US5594376A (en) * 1994-10-05 1997-01-14 Micro Linear Corporation Clock deskewing apparatus including three-input phase detector
JPH1020960A (ja) * 1996-06-28 1998-01-23 Nec Shizuoka Ltd クロックパルス供給方式
US6421391B1 (en) 1997-09-22 2002-07-16 Ncr Corporation Transmission line for high-frequency clock
JP3895912B2 (ja) * 2000-09-01 2007-03-22 矢崎総業株式会社 制御ユニット及び、多重通信システム
SG126691A1 (en) * 2002-02-28 2006-11-29 Ibm Synchronous memory modules and memory systems withselectable clock termination
US6961864B2 (en) 2002-05-16 2005-11-01 Intel Corporation Method and apparatus for terminating clock signals upon disconnection of clock trace from ground
CN1786936B (zh) * 2004-12-09 2010-12-01 株式会社日立制作所 多节点服务器装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5619700A (en) * 1979-07-27 1981-02-24 Tokyo Shibaura Electric Co Electronic device
JPS60134924A (ja) * 1983-12-24 1985-07-18 Fujitsu Ltd オプシヨンユニツト接続方式
JPS62249259A (ja) * 1986-04-23 1987-10-30 Mitsubishi Electric Corp コンピユ−タシステム
JPS63228206A (ja) * 1987-03-17 1988-09-22 Nec Corp クロツク分配方式
JPH02139610A (ja) * 1988-11-19 1990-05-29 Fujitsu Ltd 活性着脱方式
JPH0771062B2 (ja) * 1990-05-30 1995-07-31 富士通電装株式会社 クロック分配装置

Also Published As

Publication number Publication date
EP0476394A2 (de) 1992-03-25
JPH04115638A (ja) 1992-04-16
JP2546048B2 (ja) 1996-10-23
DE69129685T2 (de) 1998-12-24
EP0476394B1 (de) 1998-07-01
CA2050194C (en) 1996-12-31
CA2050194A1 (en) 1992-03-01
US5274677A (en) 1993-12-28
EP0476394A3 (en) 1992-10-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee