DE69131417D1 - Bussystem - Google Patents

Bussystem

Info

Publication number
DE69131417D1
DE69131417D1 DE69131417T DE69131417T DE69131417D1 DE 69131417 D1 DE69131417 D1 DE 69131417D1 DE 69131417 T DE69131417 T DE 69131417T DE 69131417 T DE69131417 T DE 69131417T DE 69131417 D1 DE69131417 D1 DE 69131417D1
Authority
DE
Germany
Prior art keywords
bus system
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69131417T
Other languages
English (en)
Other versions
DE69131417T2 (de
Inventor
Anil Gercekci
Roland Hermann Schwarz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of DE69131417D1 publication Critical patent/DE69131417D1/de
Publication of DE69131417T2 publication Critical patent/DE69131417T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Information Transfer Systems (AREA)
  • Tests Of Electronic Circuits (AREA)
DE69131417T 1990-12-19 1991-11-25 Bussystem Expired - Fee Related DE69131417T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9027458A GB2251099B (en) 1990-12-19 1990-12-19 Bus system

Publications (2)

Publication Number Publication Date
DE69131417D1 true DE69131417D1 (de) 1999-08-12
DE69131417T2 DE69131417T2 (de) 2000-04-20

Family

ID=10687201

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69131417T Expired - Fee Related DE69131417T2 (de) 1990-12-19 1991-11-25 Bussystem

Country Status (5)

Country Link
US (1) US5499338A (de)
EP (1) EP0491183B1 (de)
JP (1) JP3225568B2 (de)
DE (1) DE69131417T2 (de)
GB (1) GB2251099B (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2108725C (en) * 1992-11-23 1999-05-04 John J. Muramatsu Expansible high speed digital multiplexer
US6108736A (en) * 1997-09-22 2000-08-22 Intel Corporation System and method of flow control for a high speed bus
US7107371B1 (en) 1997-09-22 2006-09-12 Intel Corporation Method and apparatus for providing and embedding control information in a bus system
US6088370A (en) 1997-09-22 2000-07-11 Intel Corporation Fast 16 bit, split transaction I/O bus
US6140946A (en) * 1997-11-07 2000-10-31 International Business Machines Corporation Asynchronous serialization/deserialization system and method
US6279044B1 (en) * 1998-09-10 2001-08-21 Advanced Micro Devices, Inc. Network interface for changing byte alignment transferring on a host bus according to master and slave mode memory and I/O mapping requests
US6609221B1 (en) 1999-08-31 2003-08-19 Sun Microsystems, Inc. Method and apparatus for inducing bus saturation during operational testing of busses using a pattern generator
US6546507B1 (en) * 1999-08-31 2003-04-08 Sun Microsystems, Inc. Method and apparatus for operational envelope testing of busses to identify halt limits
US6502212B1 (en) 1999-08-31 2002-12-31 Sun Microsystems, Inc. Method and apparatus for bus parameter optimization using probes of system configurations
BA99493A (bs) 1999-10-06 2000-11-06 Mehmed Camo Poligon za treniranje fudbalera skola fudbala
DE10013665C2 (de) 2000-03-20 2003-11-06 Fresenius Medical Care De Gmbh Medizinisches Gerät mit doppeltem Kommunikationsbus
US7885282B2 (en) * 2003-07-24 2011-02-08 Seagate Technology Llc Dynamic control of physical layer quality on a serial bus
US20080276013A1 (en) * 2005-04-05 2008-11-06 Akihiko Ohtani Semiconductor Integrated Circuit
US9180238B2 (en) 2008-06-11 2015-11-10 Baxter International Inc. Distributed processing system and method for dialysis machines
US11495334B2 (en) 2015-06-25 2022-11-08 Gambro Lundia Ab Medical device system and method having a distributed database

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4296464A (en) * 1977-03-03 1981-10-20 Honeywell Inc. Process control system with local microprocessor control means
JPS5597625A (en) * 1979-01-17 1980-07-25 Fanuc Ltd Bus connection system
JPS5621435A (en) * 1979-07-31 1981-02-27 Nissan Motor Co Ltd Extrahigh frequency transmitting and receiving device
US4339819A (en) * 1980-06-17 1982-07-13 Zehntel, Inc. Programmable sequence generator for in-circuit digital testing
FR2490434B1 (fr) * 1980-09-12 1988-03-18 Quinquis Jean Paul Dispositif de resolution des conflits d'acces et d'allocation d'une liaison de type bus interconnectant un ensemble de processeurs non hierarchises
US4453229A (en) * 1982-03-11 1984-06-05 Grumman Aerospace Corporation Bus interface unit
US4485472A (en) * 1982-04-30 1984-11-27 Carnegie-Mellon University Testable interface circuit
JPS60258671A (ja) * 1984-06-05 1985-12-20 Nec Corp プロセツサ
US4720672A (en) * 1984-06-27 1988-01-19 Jon Turino Testability system
US4821269A (en) * 1986-10-23 1989-04-11 The Grass Valley Group, Inc. Diagnostic system for a digital signal processor
EP0273081B1 (de) * 1986-12-30 1993-03-24 International Business Machines Corporation Gedoppelte Schaltungsanordnung zur schnellen Übertragung und Reparierbarkeit
US4907186A (en) * 1987-02-09 1990-03-06 The United States Of America As Represented By The Secretary Of Commerce Data direct ingest system
JPS6439845A (en) * 1987-08-06 1989-02-10 Mitsubishi Electric Corp Data transmission equipment
US4935894A (en) * 1987-08-31 1990-06-19 Motorola, Inc. Multi-processor, multi-bus system with bus interface comprising FIFO register stocks for receiving and transmitting data and control information
US4864496A (en) * 1987-09-04 1989-09-05 Digital Equipment Corporation Bus adapter module for interconnecting busses in a multibus computer system
IT1223142B (it) * 1987-11-17 1990-09-12 Honeywell Bull Spa Sistema multiprocessore di elaborazione con multiplazione di dati globali
US5153509A (en) * 1988-05-17 1992-10-06 Zilog, Inc. System for testing internal nodes in receive and transmit FIFO's
US5101347A (en) * 1988-11-16 1992-03-31 National Semiconductor Corporation System for reducing skew in the parallel transmission of multi-bit data slices
US5063494A (en) * 1989-04-12 1991-11-05 Unisys Corporation Programmable data communications controller
US5115435A (en) * 1989-10-19 1992-05-19 Ncr Corporation Method and apparatus for bus executed boundary scanning
US5122691A (en) * 1990-11-21 1992-06-16 Balu Balakrishnan Integrated backplane interconnection architecture

Also Published As

Publication number Publication date
US5499338A (en) 1996-03-12
GB2251099B (en) 1994-08-03
JP3225568B2 (ja) 2001-11-05
DE69131417T2 (de) 2000-04-20
GB2251099A (en) 1992-06-24
EP0491183A1 (de) 1992-06-24
GB9027458D0 (en) 1991-02-06
JPH04302334A (ja) 1992-10-26
EP0491183B1 (de) 1999-07-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: SCHUMACHER & WILLSAU, PATENTANWALTSSOZIETAET, 80335 MUENCHEN

8327 Change in the person/name/address of the patent owner

Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US

8339 Ceased/non-payment of the annual fee