DE69126498T2 - Wiederherstellungsverfahren und Gerät für eine Pipeline-Verarbeitungseinheit eines Multiprozessor-systems - Google Patents

Wiederherstellungsverfahren und Gerät für eine Pipeline-Verarbeitungseinheit eines Multiprozessor-systems

Info

Publication number
DE69126498T2
DE69126498T2 DE69126498T DE69126498T DE69126498T2 DE 69126498 T2 DE69126498 T2 DE 69126498T2 DE 69126498 T DE69126498 T DE 69126498T DE 69126498 T DE69126498 T DE 69126498T DE 69126498 T2 DE69126498 T2 DE 69126498T2
Authority
DE
Germany
Prior art keywords
uev
board
biu
fault
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69126498T
Other languages
English (en)
Other versions
DE69126498D1 (de
Inventor
George J Barlow
James W Keeley
Richard A Lemay
Jian-Kuo Shen
Robert V Ledoux
Thomas F Joyce
Richard P Kelly
Robert C Miller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Inc
Original Assignee
Bull HN Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull HN Information Systems Inc filed Critical Bull HN Information Systems Inc
Publication of DE69126498D1 publication Critical patent/DE69126498D1/de
Application granted granted Critical
Publication of DE69126498T2 publication Critical patent/DE69126498T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793Remedial or corrective actions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766Error or fault reporting or storing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/004Error avoidance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE69126498T 1990-10-05 1991-10-01 Wiederherstellungsverfahren und Gerät für eine Pipeline-Verarbeitungseinheit eines Multiprozessor-systems Expired - Fee Related DE69126498T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/593,458 US5193181A (en) 1990-10-05 1990-10-05 Recovery method and apparatus for a pipelined processing unit of a multiprocessor system

Publications (2)

Publication Number Publication Date
DE69126498D1 DE69126498D1 (de) 1997-07-17
DE69126498T2 true DE69126498T2 (de) 1998-01-29

Family

ID=24374795

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69126498T Expired - Fee Related DE69126498T2 (de) 1990-10-05 1991-10-01 Wiederherstellungsverfahren und Gerät für eine Pipeline-Verarbeitungseinheit eines Multiprozessor-systems

Country Status (3)

Country Link
US (1) US5193181A (de)
EP (1) EP0479230B1 (de)
DE (1) DE69126498T2 (de)

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US5530804A (en) * 1994-05-16 1996-06-25 Motorola, Inc. Superscalar processor with plural pipelined execution units each unit selectively having both normal and debug modes
US5649088A (en) * 1994-12-27 1997-07-15 Lucent Technologies Inc. System and method for recording sufficient data from parallel execution stages in a central processing unit for complete fault recovery
US5924125A (en) * 1995-08-01 1999-07-13 Arya; Siamak Method and apparatus for parallel access to consecutive TLB entries
US5752062A (en) * 1995-10-02 1998-05-12 International Business Machines Corporation Method and system for performance monitoring through monitoring an order of processor events during execution in a processing system
US5751945A (en) * 1995-10-02 1998-05-12 International Business Machines Corporation Method and system for performance monitoring stalls to identify pipeline bottlenecks and stalls in a processing system
US5729726A (en) * 1995-10-02 1998-03-17 International Business Machines Corporation Method and system for performance monitoring efficiency of branch unit operation in a processing system
US5949971A (en) * 1995-10-02 1999-09-07 International Business Machines Corporation Method and system for performance monitoring through identification of frequency and length of time of execution of serialization instructions in a processing system
US5748855A (en) * 1995-10-02 1998-05-05 Iinternational Business Machines Corporation Method and system for performance monitoring of misaligned memory accesses in a processing system
US5797019A (en) * 1995-10-02 1998-08-18 International Business Machines Corporation Method and system for performance monitoring time lengths of disabled interrupts in a processing system
US5691920A (en) * 1995-10-02 1997-11-25 International Business Machines Corporation Method and system for performance monitoring of dispatch unit efficiency in a processing system
US6317803B1 (en) * 1996-03-29 2001-11-13 Intel Corporation High-throughput interconnect having pipelined and non-pipelined bus transaction modes
US5860100A (en) * 1996-10-07 1999-01-12 International Business Machines Corporation Pipelined flushing of a high level cache and invalidation of lower level caches
US5953502A (en) * 1997-02-13 1999-09-14 Helbig, Sr.; Walter A Method and apparatus for enhancing computer system security
US5924122A (en) * 1997-03-14 1999-07-13 Compaq Computer Corp. Method for error recovery spinlock in asymmetrically accessed multiprocessor shared memory
US6502208B1 (en) 1997-03-31 2002-12-31 International Business Machines Corporation Method and system for check stop error handling
US5951686A (en) * 1997-03-31 1999-09-14 International Business Machines Corporation Method and system for reboot recovery
US6065139A (en) * 1997-03-31 2000-05-16 International Business Machines Corporation Method and system for surveillance of computer system operations
US6119246A (en) * 1997-03-31 2000-09-12 International Business Machines Corporation Error collection coordination for software-readable and non-software readable fault isolation registers in a computer system
US6557121B1 (en) 1997-03-31 2003-04-29 International Business Machines Corporation Method and system for fault isolation for PCI bus errors
US6658510B1 (en) 2000-10-18 2003-12-02 International Business Machines Corporation Software method to retry access to peripherals that can cause bus timeouts during momentary busy periods
JP4457581B2 (ja) * 2003-05-28 2010-04-28 日本電気株式会社 耐障害システム、プログラム並列実行方法、耐障害システムの障害検出装置およびプログラム
US7979656B2 (en) 2004-06-01 2011-07-12 Inmage Systems, Inc. Minimizing configuration changes in a fabric-based data protection solution
US8224786B2 (en) * 2004-06-01 2012-07-17 Inmage Systems, Inc. Acquisition and write validation of data of a networked host node to perform secondary storage
US8868858B2 (en) * 2006-05-19 2014-10-21 Inmage Systems, Inc. Method and apparatus of continuous data backup and access using virtual machines
US8949395B2 (en) 2004-06-01 2015-02-03 Inmage Systems, Inc. Systems and methods of event driven recovery management
US8055745B2 (en) * 2004-06-01 2011-11-08 Inmage Systems, Inc. Methods and apparatus for accessing data from a primary data storage system for secondary storage
US9209989B2 (en) * 2004-06-01 2015-12-08 Inmage Systems, Inc. Causation of a data read operation against a first storage system by a server associated with a second storage system according to a host generated instruction
US7698401B2 (en) * 2004-06-01 2010-04-13 Inmage Systems, Inc Secondary data storage and recovery system
US7676502B2 (en) * 2006-05-22 2010-03-09 Inmage Systems, Inc. Recovery point data view shift through a direction-agnostic roll algorithm
US20060047714A1 (en) * 2004-08-30 2006-03-02 Mendocino Software, Inc. Systems and methods for rapid presentation of historical views of stored data
US7664983B2 (en) * 2004-08-30 2010-02-16 Symantec Corporation Systems and methods for event driven recovery management
US7441185B2 (en) * 2005-01-25 2008-10-21 Microsoft Corporation Method and system for binary serialization of documents
JP4555713B2 (ja) 2005-03-17 2010-10-06 富士通株式会社 エラー通知方法及び情報処理装置
US9459960B2 (en) 2005-06-03 2016-10-04 Rambus Inc. Controller device for use with electrically erasable programmable memory chip with error detection and retry modes of operation
US7831882B2 (en) 2005-06-03 2010-11-09 Rambus Inc. Memory system with error detection and retry modes of operation
US8601225B2 (en) * 2005-09-16 2013-12-03 Inmage Systems, Inc. Time ordered view of backup data on behalf of a host
US8683144B2 (en) * 2005-09-16 2014-03-25 Inmage Systems, Inc. Causation of a data read against a first storage system to optionally store a data write to preserve the version to allow viewing and recovery
US7562285B2 (en) 2006-01-11 2009-07-14 Rambus Inc. Unidirectional error code transfer for a bidirectional data link
US8554727B2 (en) * 2006-05-19 2013-10-08 Inmage Systems, Inc. Method and system of tiered quiescing
US8527470B2 (en) * 2006-05-22 2013-09-03 Rajeev Atluri Recovery point data view formation with generation of a recovery view and a coalesce policy
US8838528B2 (en) * 2006-05-22 2014-09-16 Inmage Systems, Inc. Coalescing and capturing data between events prior to and after a temporal window
US8527721B2 (en) * 2008-12-26 2013-09-03 Rajeev Atluri Generating a recovery snapshot and creating a virtual view of the recovery snapshot
US7634507B2 (en) * 2006-08-30 2009-12-15 Inmage Systems, Inc. Ensuring data persistence and consistency in enterprise storage backup systems
US8028194B2 (en) * 2008-07-25 2011-09-27 Inmage Systems, Inc Sequencing technique to account for a clock error in a backup system
US8069227B2 (en) * 2008-12-26 2011-11-29 Inmage Systems, Inc. Configuring hosts of a secondary data storage and recovery system
US8352798B2 (en) 2009-12-10 2013-01-08 International Business Machines Corporation Failure detection and fencing in a computing system
US8713361B2 (en) * 2011-05-04 2014-04-29 Advanced Micro Devices, Inc. Error protection for pipeline resources
US10223204B2 (en) 2011-12-22 2019-03-05 Intel Corporation Apparatus and method for detecting and recovering from data fetch errors
CN104704478B (zh) * 2012-06-06 2018-10-19 英特尔公司 输入/输出错误遏制事件后的恢复
US9558078B2 (en) 2014-10-28 2017-01-31 Microsoft Technology Licensing, Llc Point in time database restore from storage snapshots
CN105527508A (zh) * 2015-07-10 2016-04-27 北京中电华大电子设计有限责任公司 一种评估智能卡芯片cpu抗干扰能力的测试装置及方法
US10922203B1 (en) * 2018-09-21 2021-02-16 Nvidia Corporation Fault injection architecture for resilient GPU computing

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Also Published As

Publication number Publication date
US5193181A (en) 1993-03-09
EP0479230A2 (de) 1992-04-08
DE69126498D1 (de) 1997-07-17
EP0479230B1 (de) 1997-06-11
EP0479230A3 (en) 1993-03-17

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