DE69027030D1 - Eine fehlertolerante datenspeicherungsanordnung - Google Patents

Eine fehlertolerante datenspeicherungsanordnung

Info

Publication number
DE69027030D1
DE69027030D1 DE69027030T DE69027030T DE69027030D1 DE 69027030 D1 DE69027030 D1 DE 69027030D1 DE 69027030 T DE69027030 T DE 69027030T DE 69027030 T DE69027030 T DE 69027030T DE 69027030 D1 DE69027030 D1 DE 69027030D1
Authority
DE
Germany
Prior art keywords
data storage
storage arrangement
tolerant data
error tolerant
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69027030T
Other languages
English (en)
Other versions
DE69027030T2 (de
Inventor
Neal Macdonald
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SYNTAQ LTD., CRAMLINGTON, NORTHUMBERLAND, GB
Original Assignee
MV Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB898915543A external-priority patent/GB8915543D0/en
Priority claimed from GB898918126A external-priority patent/GB8918126D0/en
Application filed by MV Ltd filed Critical MV Ltd
Publication of DE69027030D1 publication Critical patent/DE69027030D1/de
Application granted granted Critical
Publication of DE69027030T2 publication Critical patent/DE69027030T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
DE69027030T 1989-07-06 1990-07-06 Eine fehlertolerante datenspeicherungsanordnung Expired - Fee Related DE69027030T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB898915543A GB8915543D0 (en) 1989-07-06 1989-07-06 A fault tolerant storage system
GB898918126A GB8918126D0 (en) 1989-08-08 1989-08-08 A fault tolerant random access memory system
PCT/GB1990/001051 WO1991001023A1 (en) 1989-07-06 1990-07-06 A fault tolerant data storage system

Publications (2)

Publication Number Publication Date
DE69027030D1 true DE69027030D1 (de) 1996-06-20
DE69027030T2 DE69027030T2 (de) 1996-12-12

Family

ID=26295581

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69027030T Expired - Fee Related DE69027030T2 (de) 1989-07-06 1990-07-06 Eine fehlertolerante datenspeicherungsanordnung

Country Status (6)

Country Link
US (1) US5406565A (de)
EP (1) EP0480966B1 (de)
JP (1) JPH05500724A (de)
AU (1) AU5930390A (de)
DE (1) DE69027030T2 (de)
WO (1) WO1991001023A1 (de)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9023867D0 (en) * 1990-11-02 1990-12-12 Mv Ltd Improvements relating to a fault tolerant storage system
FR2699301B1 (fr) * 1992-12-16 1995-02-10 Sgs Thomson Microelectronics Procédé de traitement d'éléments défectueux dans une mémoire.
GB9305801D0 (en) * 1993-03-19 1993-05-05 Deans Alexander R Semiconductor memory system
US5537631A (en) * 1994-03-21 1996-07-16 Current Logic Systems, Inc. Memory management technique for defective memory
GB2291516A (en) * 1995-03-28 1996-01-24 Memory Corp Plc Provision of write capability in partial memory systems
US5781717A (en) * 1996-09-19 1998-07-14 I-Cube, Inc. Dynamic spare column replacement memory system
US5781413A (en) * 1996-09-30 1998-07-14 International Business Machines Corporation Method and apparatus for directing the input/output connection of integrated circuit chip cube configurations
US5841710A (en) * 1997-02-14 1998-11-24 Micron Electronics, Inc. Dynamic address remapping decoder
US6032264A (en) * 1997-04-22 2000-02-29 Micron Technology, Inc. Apparatus and method implementing repairs on a memory device
US6182239B1 (en) * 1998-02-06 2001-01-30 Stmicroelectronics, Inc. Fault-tolerant codes for multi-level memories
US6081463A (en) * 1998-02-25 2000-06-27 Micron Technology, Inc. Semiconductor memory remapping
US6332183B1 (en) 1998-03-05 2001-12-18 Micron Technology, Inc. Method for recovery of useful areas of partially defective synchronous memory components
US6314527B1 (en) 1998-03-05 2001-11-06 Micron Technology, Inc. Recovery of useful areas of partially defective synchronous memory components
US6381707B1 (en) 1998-04-28 2002-04-30 Micron Technology, Inc. System for decoding addresses for a defective memory array
US6381708B1 (en) 1998-04-28 2002-04-30 Micron Technology, Inc. Method for decoding addresses for a defective memory array
US6397349B2 (en) * 1998-10-13 2002-05-28 Agere Systems Guardian Corp. Built-in self-test and self-repair methods and devices for computer memories comprising a reconfiguration memory device
US6496876B1 (en) 1998-12-21 2002-12-17 Micron Technology, Inc. System and method for storing a tag to identify a functional storage location in a memory device
US6578157B1 (en) 2000-03-06 2003-06-10 Micron Technology, Inc. Method and apparatus for recovery of useful areas of partially defective direct rambus rimm components
US7269765B1 (en) 2000-04-13 2007-09-11 Micron Technology, Inc. Method and apparatus for storing failing part locations in a module
US6671834B1 (en) * 2000-07-18 2003-12-30 Micron Technology, Inc. Memory redundancy with programmable non-volatile control
KR100418522B1 (ko) * 2001-06-11 2004-02-14 삼성전자주식회사 이동가능한 스페어 메모리 어레이 어드레스를 갖는 불휘발성 반도체 메모리 장치 및 그에 따른 리드방법
US7320100B2 (en) * 2003-05-20 2008-01-15 Cray Inc. Apparatus and method for memory with bit swapping on the fly and testing
US7184916B2 (en) * 2003-05-20 2007-02-27 Cray Inc. Apparatus and method for testing memory cards
DE10335708B4 (de) * 2003-08-05 2009-02-26 Qimonda Ag Hub-Baustein zum Anschließen von einem oder mehreren Speicherbausteinen
US7490283B2 (en) 2004-05-13 2009-02-10 Sandisk Corporation Pipelined data relocation and improved chip architectures
US7849381B2 (en) * 2004-12-21 2010-12-07 Sandisk Corporation Method for copying data in reprogrammable non-volatile memory
US7996710B2 (en) 2007-04-25 2011-08-09 Hewlett-Packard Development Company, L.P. Defect management for a semiconductor memory system
US7694093B2 (en) 2007-04-27 2010-04-06 Hewlett-Packard Development Company, L.P. Memory module and method for mirroring data by rank
US7843746B2 (en) * 2007-12-31 2010-11-30 Qimonda Ag Method and device for redundancy replacement in semiconductor devices using a multiplexer
US20100241783A1 (en) * 2009-03-23 2010-09-23 Honeywell International Inc. Memory node for use within a data storage system having a plurality of interconnected memory nodes
KR101277479B1 (ko) * 2010-08-31 2013-06-21 에스케이하이닉스 주식회사 반도체 메모리 장치
KR20120122220A (ko) * 2011-04-28 2012-11-07 에스케이하이닉스 주식회사 반도체메모리장치 및 반도체메모리장치의 리페어방법
US8879295B1 (en) 2013-08-05 2014-11-04 International Business Machines Corporation Electronic circuit for remapping faulty memory arrays of variable size
US9343185B2 (en) 2013-09-26 2016-05-17 International Business Machines Corporation Electronic circuit for fitting a virtual address range to a physical memory containing faulty address
US9442799B2 (en) 2014-06-26 2016-09-13 Microsoft Technology Licensing, Llc Extended lifetime memory

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3735368A (en) * 1971-06-25 1973-05-22 Ibm Full capacity monolithic memory utilizing defective storage cells
US4527251A (en) * 1982-12-17 1985-07-02 Honeywell Information Systems Inc. Remap method and apparatus for a memory system which uses partially good memory devices
JPH0670880B2 (ja) * 1983-01-21 1994-09-07 株式会社日立マイコンシステム 半導体記憶装置
US4556975A (en) * 1983-02-07 1985-12-03 Westinghouse Electric Corp. Programmable redundancy circuit
US4639897A (en) * 1983-08-31 1987-01-27 Rca Corporation Priority encoded spare element decoder
US4584681A (en) * 1983-09-02 1986-04-22 International Business Machines Corporation Memory correction scheme using spare arrays
JP2577724B2 (ja) * 1986-07-31 1997-02-05 三菱電機株式会社 半導体記憶装置
JPH03104097A (ja) * 1989-09-18 1991-05-01 Fujitsu Ltd 半導体記憶装置

Also Published As

Publication number Publication date
US5406565A (en) 1995-04-11
DE69027030T2 (de) 1996-12-12
EP0480966A1 (de) 1992-04-22
JPH05500724A (ja) 1993-02-12
WO1991001023A1 (en) 1991-01-24
EP0480966B1 (de) 1996-05-15
AU5930390A (en) 1991-02-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: SYNTAQ LTD., CRAMLINGTON, NORTHUMBERLAND, GB

8339 Ceased/non-payment of the annual fee