DE69018538T2 - Verfahren und Gerät zur Steuerprogrammentwicklung. - Google Patents

Verfahren und Gerät zur Steuerprogrammentwicklung.

Info

Publication number
DE69018538T2
DE69018538T2 DE69018538T DE69018538T DE69018538T2 DE 69018538 T2 DE69018538 T2 DE 69018538T2 DE 69018538 T DE69018538 T DE 69018538T DE 69018538 T DE69018538 T DE 69018538T DE 69018538 T2 DE69018538 T2 DE 69018538T2
Authority
DE
Germany
Prior art keywords
control programs
developing control
developing
programs
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69018538T
Other languages
English (en)
Other versions
DE69018538D1 (de
Inventor
Shinpei Nakaniwa
Hirohisa Nashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Unisia Automotive Ltd
Original Assignee
Unisia Jecs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unisia Jecs Corp filed Critical Unisia Jecs Corp
Application granted granted Critical
Publication of DE69018538D1 publication Critical patent/DE69018538D1/de
Publication of DE69018538T2 publication Critical patent/DE69018538T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/3664—Environments for testing or debugging software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Control By Computers (AREA)
  • Programmable Controllers (AREA)
  • Combined Controls Of Internal Combustion Engines (AREA)
DE69018538T 1989-07-31 1990-07-31 Verfahren und Gerät zur Steuerprogrammentwicklung. Expired - Fee Related DE69018538T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1196947A JPH0362202A (ja) 1989-07-31 1989-07-31 制御プログラム開発装置

Publications (2)

Publication Number Publication Date
DE69018538D1 DE69018538D1 (de) 1995-05-18
DE69018538T2 true DE69018538T2 (de) 1995-10-19

Family

ID=16366306

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69018538T Expired - Fee Related DE69018538T2 (de) 1989-07-31 1990-07-31 Verfahren und Gerät zur Steuerprogrammentwicklung.

Country Status (4)

Country Link
US (1) US5261078A (de)
EP (1) EP0411584B1 (de)
JP (1) JPH0362202A (de)
DE (1) DE69018538T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5652869A (en) * 1991-03-07 1997-07-29 Digital Equipment Corporation System for executing and debugging multiple codes in a multi-architecture environment using jacketing means for jacketing the cross-domain calls
CA2082066C (en) * 1991-03-07 1998-04-21 James A. Wooldridge Software debugging system and method especially adapted for code debugging within a multi-architecture environment
MX9200935A (es) * 1991-03-07 1993-03-01 Digital Equipment Corp Sistema y metodo para detectar llamadas de instruccion de dominio cruzado en un sistema de computadora
JPH05314073A (ja) * 1992-05-08 1993-11-26 Nec Corp プログラム仕様データの部分転送方式
KR100206461B1 (ko) * 1995-11-24 1999-07-01 윤종용 프로세스 관리의 구현 및 가시화 방법
DE19745682B4 (de) * 1997-10-16 2010-03-18 Robert Bosch Gmbh Verfahren und Vorrichtung zur Ermittlung von Kenngrößen
US6314557B1 (en) 1998-12-14 2001-11-06 Infineon Technologies Development Center Tel Aviv Ltd Hybrid computer programming environment
WO2005066602A1 (ja) * 2004-01-09 2005-07-21 Hino Motors, Ltd. エンジンの過渡試験装置および方法
DE102006002738A1 (de) * 2006-01-20 2007-08-02 Robert Bosch Gmbh Verfahren und Vorrichtung zur Steuerung einer Brennkraftmaschine

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4189773A (en) * 1974-07-03 1980-02-19 General Electric Company On-line memory space allocation
US4115853A (en) * 1976-12-21 1978-09-19 Allen-Bradley Company Jump structure for a digital control system
US4312066A (en) * 1979-12-28 1982-01-19 International Business Machines Corporation Diagnostic/debug machine architecture
IT1151351B (it) * 1982-01-19 1986-12-17 Italtel Spa Disposizione circuitale atta a realizzare lo scambio di dati tra una coppia di elaboratori operanti secondo il principio master-slave
US4466098A (en) * 1982-06-11 1984-08-14 Siemens Corporation Cross channel circuit for an electronic system having two or more redundant computers
US4520440A (en) * 1982-12-15 1985-05-28 International Business Machines Corporation Test verification of processor architecture having a partial instruction set
JPS60244138A (ja) * 1984-05-18 1985-12-04 Nec Corp 通信制御用プロセツサ
US4691316A (en) * 1985-02-14 1987-09-01 Support Technologies, Inc. ROM emulator for diagnostic tester
JPH0727471B2 (ja) * 1985-08-01 1995-03-29 日本電気株式会社 マイクロコンピュータ開発装置
US4899306A (en) * 1985-08-26 1990-02-06 American Telephone And Telegraph Company, At&T Bell Laboratories Test interface circuit which generates different interface control signals for different target computers responding to control signals from host computer
US4937740A (en) * 1985-09-18 1990-06-26 Cadre Technologies, Inc. Real time software analyzing system for storing selective m-bit addresses based upon correspondingly generated n-bit tags
JPS62182939A (ja) * 1986-02-07 1987-08-11 Hitachi Ltd 情報処理装置の論理シミユレ−シヨン方法
JPS62281037A (ja) * 1986-05-30 1987-12-05 Toshiba Corp メモリデ−タ先読み機能を持つインタフエ−スユニツト
JPS62293305A (ja) * 1986-06-11 1987-12-19 Mitsubishi Electric Corp Ｆａコントロ−ラのソフトウエア開発装置
US4796258A (en) * 1986-06-23 1989-01-03 Tektronix, Inc. Microprocessor system debug tool
JPH01154204A (ja) * 1987-12-11 1989-06-16 Hitachi Ltd プラント監視方法
IE60444B1 (en) * 1988-03-30 1994-07-13 Elverex Ltd A software verification apparatus
US5134701A (en) * 1989-02-10 1992-07-28 Hewlett-Packard Co. Test apparatus performing runtime replacement of program instructions with breakpoint instructions for processor having multiple instruction fetch capabilities

Also Published As

Publication number Publication date
JPH0362202A (ja) 1991-03-18
EP0411584A3 (en) 1991-12-27
US5261078A (en) 1993-11-09
EP0411584A2 (de) 1991-02-06
EP0411584B1 (de) 1995-04-12
DE69018538D1 (de) 1995-05-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee