DE69007640D1 - BICMOS-Ausgangstreiber. - Google Patents

BICMOS-Ausgangstreiber.

Info

Publication number
DE69007640D1
DE69007640D1 DE90100878T DE69007640T DE69007640D1 DE 69007640 D1 DE69007640 D1 DE 69007640D1 DE 90100878 T DE90100878 T DE 90100878T DE 69007640 T DE69007640 T DE 69007640T DE 69007640 D1 DE69007640 D1 DE 69007640D1
Authority
DE
Germany
Prior art keywords
output driver
bicmos output
bicmos
driver
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE90100878T
Other languages
English (en)
Other versions
DE69007640T2 (de
Inventor
Chuen-Der Nmi Lien
Wingyu Nmi Leung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics America Inc
Original Assignee
Integrated Device Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Integrated Device Technology Inc filed Critical Integrated Device Technology Inc
Publication of DE69007640D1 publication Critical patent/DE69007640D1/de
Application granted granted Critical
Publication of DE69007640T2 publication Critical patent/DE69007640T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
DE69007640T 1989-01-30 1990-01-17 BICMOS-Ausgangstreiber. Expired - Fee Related DE69007640T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/303,855 US4933574A (en) 1989-01-30 1989-01-30 BiCMOS output driver

Publications (2)

Publication Number Publication Date
DE69007640D1 true DE69007640D1 (de) 1994-05-05
DE69007640T2 DE69007640T2 (de) 1994-07-14

Family

ID=23174005

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69007640T Expired - Fee Related DE69007640T2 (de) 1989-01-30 1990-01-17 BICMOS-Ausgangstreiber.

Country Status (4)

Country Link
US (1) US4933574A (de)
EP (1) EP0380960B1 (de)
JP (1) JP2535082B2 (de)
DE (1) DE69007640T2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0683058B2 (ja) * 1989-10-06 1994-10-19 株式会社東芝 出力回路
JPH03158018A (ja) * 1989-11-15 1991-07-08 Nec Corp 入力回路
US5148047A (en) * 1990-06-11 1992-09-15 Motorola, Inc. CMOS bus driver circuit with improved speed
US5153457A (en) * 1990-12-12 1992-10-06 Texas Instruments Incorporated Output buffer with di/dt and dv/dt and tri-state control
JPH06506333A (ja) 1991-03-18 1994-07-14 クウォリティ・セミコンダクタ・インコーポレイテッド 高速トランスミッションゲートスイッチ
US6208195B1 (en) 1991-03-18 2001-03-27 Integrated Device Technology, Inc. Fast transmission gate switch
KR960705273A (ko) * 1993-09-16 1996-10-09 스티븐 에이치. 본더래치 고속 전송 게이트 스위치를 사용한 스캔 테스트 회로(scan test circuit using fast transmission gate switch)
JP3190199B2 (ja) * 1994-03-16 2001-07-23 株式会社東芝 同相信号出力回路、逆相信号出力回路、二相信号出力回路及び信号出力回路
DE69503205T2 (de) * 1994-03-25 1999-02-11 Philips Norden Ab Cmos eingang mit vcc-kompensierter dynamischer schwelle
US5428303A (en) * 1994-05-20 1995-06-27 National Semiconductor Corporation Bias generator for low ground bounce output driver
US5563543A (en) * 1994-12-14 1996-10-08 Philips Electronics North America Corporation Low-voltage BiCMOS digital delay chain suitable for operation over a wide power supply range
EP0882265A1 (de) * 1996-02-20 1998-12-09 Intergraph Corporation Vorrichtung und verfahren für signalverarbeitung auf gtl-typenbussen
US6307399B1 (en) 1998-06-02 2001-10-23 Integrated Device Technology, Inc. High speed buffer circuit with improved noise immunity
US6329834B1 (en) * 1999-12-30 2001-12-11 Texas Instruments Incorporated Reduction of switching noise in integrated circuits
US6570405B1 (en) 2001-12-20 2003-05-27 Integrated Device Technology, Inc. Integrated output driver circuits having current sourcing and current sinking characteristics that inhibit power bounce and ground bounce
US6894529B1 (en) 2003-07-09 2005-05-17 Integrated Device Technology, Inc. Impedance-matched output driver circuits having linear characteristics and enhanced coarse and fine tuning control

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57166734A (en) * 1981-04-06 1982-10-14 Matsushita Electric Ind Co Ltd Electronic circuit
JPS60125015A (ja) * 1983-12-12 1985-07-04 Hitachi Ltd インバ−タ回路
JPS61118023A (ja) * 1984-11-14 1986-06-05 Toshiba Corp Ｍｏｓ型半導体集積回路の入力ゲ−ト回路
JP2544343B2 (ja) * 1985-02-07 1996-10-16 株式会社日立製作所 半導体集積回路装置
EP0209805B1 (de) * 1985-07-22 1993-04-07 Hitachi, Ltd. Halbleitereinrichtung mit bipolarem Transistor und Isolierschicht-Feldeffekttransistor
JPS62169520A (ja) * 1986-01-22 1987-07-25 Hitachi Ltd Ｌｓｉ
JPS62220026A (ja) * 1986-03-20 1987-09-28 Toshiba Corp 出力バツフア回路
US4707623A (en) * 1986-07-29 1987-11-17 Rca Corporation CMOS input level shifting buffer circuit
JPS6382122A (ja) * 1986-09-26 1988-04-12 Toshiba Corp 論理回路
US4785201A (en) * 1986-12-29 1988-11-15 Integrated Device Technology, Inc. High speed/high drive CMOS output buffer with inductive bounce suppression

Also Published As

Publication number Publication date
US4933574A (en) 1990-06-12
EP0380960B1 (de) 1994-03-30
EP0380960A2 (de) 1990-08-08
JP2535082B2 (ja) 1996-09-18
JPH02235433A (ja) 1990-09-18
EP0380960A3 (en) 1990-12-05
DE69007640T2 (de) 1994-07-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: BLUMBACH, KRAMER & PARTNER, 65193 WIESBADEN

8339 Ceased/non-payment of the annual fee