DE68925046T2 - Konfigurationssteuerungssystem - Google Patents

Konfigurationssteuerungssystem

Info

Publication number
DE68925046T2
DE68925046T2 DE68925046T DE68925046T DE68925046T2 DE 68925046 T2 DE68925046 T2 DE 68925046T2 DE 68925046 T DE68925046 T DE 68925046T DE 68925046 T DE68925046 T DE 68925046T DE 68925046 T2 DE68925046 T2 DE 68925046T2
Authority
DE
Germany
Prior art keywords
control system
configuration control
configuration
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE68925046T
Other languages
English (en)
Other versions
DE68925046D1 (de
Inventor
Takashi Daini Saginuma G Chiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE68925046D1 publication Critical patent/DE68925046D1/de
Application granted granted Critical
Publication of DE68925046T2 publication Critical patent/DE68925046T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
DE68925046T 1988-02-24 1989-02-23 Konfigurationssteuerungssystem Expired - Lifetime DE68925046T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63041031A JPH07111713B2 (ja) 1988-02-24 1988-02-24 構成変更制御方式

Publications (2)

Publication Number Publication Date
DE68925046D1 DE68925046D1 (de) 1996-01-25
DE68925046T2 true DE68925046T2 (de) 1996-05-09

Family

ID=12597028

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68925046T Expired - Lifetime DE68925046T2 (de) 1988-02-24 1989-02-23 Konfigurationssteuerungssystem

Country Status (4)

Country Link
US (1) US5125081A (de)
EP (1) EP0330475B1 (de)
JP (1) JPH07111713B2 (de)
DE (1) DE68925046T2 (de)

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EP0457308B1 (de) * 1990-05-18 1997-01-22 Fujitsu Limited Datenverarbeitungssystem mit einem Eingangs-/Ausgangswegetrennmechanismus und Verfahren zur Steuerung des Datenverarbeitungssystems
US5301344A (en) * 1991-01-29 1994-04-05 Analogic Corporation Multibus sequential processor to perform in parallel a plurality of reconfigurable logic operations on a plurality of data sets
US5170472A (en) * 1991-03-28 1992-12-08 International Business Machines Corp. Dynamically changing a system i/o configuration definition
JP2552075B2 (ja) * 1992-05-22 1996-11-06 インターナショナル・ビジネス・マシーンズ・コーポレイション コンピュータ・システム
FR2692701B1 (fr) * 1992-06-18 1994-09-30 Aerospatiale Procédé de contrôle de configuration d'une installation complexe et dispositif pour la mise en Óoeuvre de ce procédé.
US5371852A (en) * 1992-10-14 1994-12-06 International Business Machines Corporation Method and apparatus for making a cluster of computers appear as a single host on a network
US5574914A (en) * 1993-01-04 1996-11-12 Unisys Corporation Method and apparatus for performing system resource partitioning
SE9300283D0 (sv) * 1993-01-29 1993-01-29 Siemens Elema Ab Foerfarande och anordning foer elektrodoevervakning vid elektriska hjaertstimulatorer
JPH0793236A (ja) * 1993-09-20 1995-04-07 Fujitsu Ltd バス制御装置
US6067615A (en) * 1993-11-30 2000-05-23 Trw Inc. Reconfigurable processor for executing successive function sequences in a processor operation
US5717950A (en) 1994-01-11 1998-02-10 Hitachi, Ltd. Input/output device information management system for multi-computer system
US5515501A (en) * 1994-01-21 1996-05-07 Unisys Corporation Redundant maintenance architecture
US5603005A (en) * 1994-12-27 1997-02-11 Unisys Corporation Cache coherency scheme for XBAR storage structure with delayed invalidates until associated write request is executed
US5717942A (en) * 1994-12-27 1998-02-10 Unisys Corporation Reset for independent partitions within a computer system
JPH08314846A (ja) * 1995-05-23 1996-11-29 Kofu Nippon Denki Kk 一実装位置に多種装置接続可能な情報処理システム
US5666486A (en) * 1995-06-23 1997-09-09 Data General Corporation Multiprocessor cluster membership manager framework
US5694615A (en) * 1995-06-26 1997-12-02 Hewlett Packard Company Storage system having storage units interconnected to form multiple loops to provide simultaneous access from multiple hosts
EP0843856A1 (de) * 1995-08-11 1998-05-27 Siemens Nixdorf Informationssysteme AG Anordnung zum anschluss peripherer speichergeräte
US5717853A (en) * 1995-10-23 1998-02-10 International Business Machines Corporation Information handling system having router including first mode for configuring itself, second mode for configuring its connected devices and third mode for system operation
US5675768A (en) * 1996-02-01 1997-10-07 Unisys Corporation Store software instrumentation package instruction
US5854896A (en) * 1996-06-17 1998-12-29 International Business Machines Corporation System for preserving logical partitions of distributed parallel processing system after re-booting by mapping nodes to their respective sub-environments
US6279098B1 (en) 1996-12-16 2001-08-21 Unisys Corporation Method of and apparatus for serial dynamic system partitioning
US5822766A (en) * 1997-01-09 1998-10-13 Unisys Corporation Main memory interface for high speed data transfer
US5970253A (en) * 1997-01-09 1999-10-19 Unisys Corporation Priority logic for selecting and stacking data
US6807557B1 (en) 2000-05-31 2004-10-19 International Business Machines Corporation Method, system and program products for providing clusters of a computing environment
US7225320B2 (en) * 2000-12-28 2007-05-29 Koninklijke Philips Electronics N.V. Control architecture for a high-throughput multi-processor channel decoding system
US7921188B2 (en) * 2001-08-16 2011-04-05 Newisys, Inc. Computer system partitioning using data transfer routing mechanism
US7290054B2 (en) 2002-04-26 2007-10-30 Redback Networks Inc. Dynamic modification of a subscriber connection
US7155525B2 (en) * 2002-05-28 2006-12-26 Newisys, Inc. Transaction management in systems having multiple multi-processor clusters
US7281055B2 (en) * 2002-05-28 2007-10-09 Newisys, Inc. Routing mechanisms in systems having multiple multi-processor clusters
US6959312B2 (en) * 2002-05-30 2005-10-25 International Business Machines Corporation Fast provisioning of storage in a network of production computers for minimizing inter-customer delay
US7577755B2 (en) * 2002-11-19 2009-08-18 Newisys, Inc. Methods and apparatus for distributing system management signals
US7386626B2 (en) * 2003-06-23 2008-06-10 Newisys, Inc. Bandwidth, framing and error detection in communications between multi-processor clusters of multi-cluster computer systems
US7577727B2 (en) * 2003-06-27 2009-08-18 Newisys, Inc. Dynamic multiple cluster system reconfiguration
US7395347B2 (en) * 2003-08-05 2008-07-01 Newisys, Inc, Communication between and within multi-processor clusters of multi-cluster computer systems
US7222262B2 (en) * 2003-08-05 2007-05-22 Newisys, Inc. Methods and devices for injecting commands in systems having multiple multi-processor clusters
WO2010034167A1 (zh) * 2008-09-28 2010-04-01 北京大学深圳研究生院 一种集成电路的处理器结构

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2000608C3 (de) * 1970-01-08 1973-07-12 Siemens Ag Schaltungsanordnung fuer eine Nachrichtenverarbeitungs-,insbesondere fuer eine Nachrichtenvermittlungsanlage
JPS5440182B2 (de) * 1974-02-26 1979-12-01
US4030072A (en) * 1974-12-18 1977-06-14 Xerox Corporation Computer system operation and control
US4014005A (en) * 1976-01-05 1977-03-22 International Business Machines Corporation Configuration and control unit for a heterogeneous multi-system
US4266271A (en) * 1978-10-10 1981-05-05 Chamoff Martin E Reconfigurable cluster of data-entry terminals
US4370708A (en) * 1978-10-31 1983-01-25 Honeywell Information Systems Inc. Logic system for selectively reconfiguring an intersystem communication link
US4349871A (en) * 1980-01-28 1982-09-14 Digital Equipment Corporation Duplicate tag store for cached multiprocessor system
US4480307A (en) * 1982-01-04 1984-10-30 Intel Corporation Interface for use between a memory and components of a module switching apparatus
US4503534A (en) * 1982-06-30 1985-03-05 Intel Corporation Apparatus for redundant operation of modules in a multiprocessing system
JPS59124099A (ja) * 1982-12-29 1984-07-18 Fujitsu Ltd 共通記憶領域の障害復旧処理方式
JPS6093563A (ja) * 1983-10-27 1985-05-25 Hitachi Ltd バツフア記憶制御方式
JPS6168646A (ja) * 1984-09-11 1986-04-09 Fujitsu Ltd 自動本体系切替方法
US4970640A (en) * 1987-08-28 1990-11-13 International Business Machines Corporation Device initiated partial system quiescing

Also Published As

Publication number Publication date
EP0330475A3 (de) 1991-12-04
JPH01216459A (ja) 1989-08-30
EP0330475A2 (de) 1989-08-30
DE68925046D1 (de) 1996-01-25
JPH07111713B2 (ja) 1995-11-29
EP0330475B1 (de) 1995-12-13
US5125081A (en) 1992-06-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP