DE68924304D1 - Schaltung zur Prüfung von durch Mikrobefehle gesteuerten Schaltungsblöcken. - Google Patents
Schaltung zur Prüfung von durch Mikrobefehle gesteuerten Schaltungsblöcken.Info
- Publication number
- DE68924304D1 DE68924304D1 DE68924304T DE68924304T DE68924304D1 DE 68924304 D1 DE68924304 D1 DE 68924304D1 DE 68924304 T DE68924304 T DE 68924304T DE 68924304 T DE68924304 T DE 68924304T DE 68924304 D1 DE68924304 D1 DE 68924304D1
- Authority
- DE
- Germany
- Prior art keywords
- circuit
- controlled
- testing micro
- blocks
- circuit blocks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Software Systems (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63154015A JPH01320544A (ja) | 1988-06-22 | 1988-06-22 | テスト容易化回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68924304D1 true DE68924304D1 (de) | 1995-10-26 |
DE68924304T2 DE68924304T2 (de) | 1996-04-04 |
Family
ID=15575045
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68924304T Expired - Fee Related DE68924304T2 (de) | 1988-06-22 | 1989-06-22 | Schaltung zur Prüfung von durch Mikrobefehle gesteuerten Schaltungsblöcken. |
Country Status (5)
Country | Link |
---|---|
US (1) | US5398250A (de) |
EP (1) | EP0347905B1 (de) |
JP (1) | JPH01320544A (de) |
KR (1) | KR920003473B1 (de) |
DE (1) | DE68924304T2 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0682325B2 (ja) * | 1990-05-29 | 1994-10-19 | 株式会社東芝 | 情報処理装置のテスト容易化回路 |
JP2806075B2 (ja) * | 1991-06-06 | 1998-09-30 | 日本電気株式会社 | マイクロコンピュータ |
JPH05233352A (ja) * | 1992-02-19 | 1993-09-10 | Nec Corp | マイクロプロセッサ |
US5869979A (en) * | 1996-04-05 | 1999-02-09 | Altera Corporation | Technique for preconditioning I/Os during reconfiguration |
US6108798A (en) * | 1997-07-02 | 2000-08-22 | International Business Machines Corporation | Self programmed built in self test |
US5764655A (en) * | 1997-07-02 | 1998-06-09 | International Business Machines Corporation | Built in self test with memory |
US6230290B1 (en) | 1997-07-02 | 2001-05-08 | International Business Machines Corporation | Method of self programmed built in self test |
US5936976A (en) * | 1997-07-25 | 1999-08-10 | Vlsi Technology, Inc. | Selecting a test data input bus to supply test data to logical blocks within an integrated circuit |
US6185712B1 (en) | 1998-07-02 | 2001-02-06 | International Business Machines Corporation | Chip performance optimization with self programmed built in self test |
US6643800B1 (en) * | 2000-02-02 | 2003-11-04 | Hewlett-Packard Development Company, L.P. | Method and apparatus for testing microarchitectural features by using tests written in microcode |
JP4228061B2 (ja) * | 2000-12-07 | 2009-02-25 | 富士通マイクロエレクトロニクス株式会社 | 集積回路の試験装置および試験方法 |
US6573862B2 (en) * | 2000-12-12 | 2003-06-03 | Harris Corporation | Phased array antenna including element control device providing fault detection and related methods |
JP2007101395A (ja) * | 2005-10-05 | 2007-04-19 | Sony Corp | 回路装置の検査装置、検査方法及び製造方法 |
US8365029B2 (en) * | 2007-12-26 | 2013-01-29 | Infineon Technologies Ag | Digital circuits and methods for testing a digital circuit |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3603936A (en) * | 1969-12-08 | 1971-09-07 | Ibm | Microprogrammed data processing system |
US3786434A (en) * | 1972-12-20 | 1974-01-15 | Ibm | Full capacity small size microprogrammed control unit |
US4212059A (en) * | 1977-03-14 | 1980-07-08 | Tokyo Shibaura Electric Co., Ltd. | Information processing system |
US4313200A (en) * | 1978-08-28 | 1982-01-26 | Takeda Riken Kogyo Kabushikikaisha | Logic test system permitting test pattern changes without dummy cycles |
US4342084A (en) * | 1980-08-11 | 1982-07-27 | International Business Machines Corporation | Main storage validation means |
JPS58146834A (ja) * | 1982-02-24 | 1983-09-01 | Sumitomo Metal Ind Ltd | 炉体耐火物状態の推定方法 |
JPS59216249A (ja) * | 1983-05-23 | 1984-12-06 | Toshiba Corp | 集積回路装置 |
DE3379354D1 (en) * | 1983-05-25 | 1989-04-13 | Ibm Deutschland | Test and diagnostic device for a digital computer |
DE3373729D1 (en) * | 1983-12-08 | 1987-10-22 | Ibm Deutschland | Testing and diagnostic device for a digital calculator |
JPH0668732B2 (ja) * | 1984-11-21 | 1994-08-31 | 株式会社日立製作所 | 情報処理装置のスキヤン方式 |
IT1184054B (it) * | 1985-03-25 | 1987-10-22 | Cselt Centro Studi Lab Telecom | Unita di controllo di microprogramma autocollaudante con rilevazione in linea degli errori in tecnologia mos |
US4720811A (en) * | 1985-04-26 | 1988-01-19 | Hitachi, Ltd. | Microprocessor capable of stopping its operation at any cycle time |
US4920538A (en) * | 1985-06-28 | 1990-04-24 | International Business Machines Corporation | Method of checking the execution of microcode sequences |
US4710927A (en) * | 1986-07-24 | 1987-12-01 | Integrated Device Technology, Inc. | Diagnostic circuit |
US4811345A (en) * | 1986-12-16 | 1989-03-07 | Advanced Micro Devices, Inc. | Methods and apparatus for providing a user oriented microprocessor test interface for a complex, single chip, general purpose central processing unit |
JPS63193237A (ja) * | 1987-02-06 | 1988-08-10 | Toshiba Corp | 半導体集積回路装置 |
JPH0743672B2 (ja) * | 1987-02-18 | 1995-05-15 | 株式会社東芝 | メモリ保護違反検出装置 |
US5043985A (en) * | 1987-05-05 | 1991-08-27 | Industrial Technology Research Institute | Integrated circuit testing arrangement |
JP2513762B2 (ja) * | 1988-01-29 | 1996-07-03 | 株式会社東芝 | 論理回路 |
-
1988
- 1988-06-22 JP JP63154015A patent/JPH01320544A/ja active Pending
-
1989
- 1989-06-21 KR KR1019890008564A patent/KR920003473B1/ko not_active IP Right Cessation
- 1989-06-22 DE DE68924304T patent/DE68924304T2/de not_active Expired - Fee Related
- 1989-06-22 EP EP89111370A patent/EP0347905B1/de not_active Expired - Lifetime
-
1994
- 1994-06-27 US US08/266,112 patent/US5398250A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0347905A2 (de) | 1989-12-27 |
KR920003473B1 (ko) | 1992-05-01 |
KR900000769A (ko) | 1990-01-31 |
DE68924304T2 (de) | 1996-04-04 |
JPH01320544A (ja) | 1989-12-26 |
EP0347905B1 (de) | 1995-09-20 |
EP0347905A3 (de) | 1991-06-12 |
US5398250A (en) | 1995-03-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |