DE68922795D1 - Verfahren zum Messen des spezifischen Kontaktwiderstandes in integrierten Schaltungen. - Google Patents
Verfahren zum Messen des spezifischen Kontaktwiderstandes in integrierten Schaltungen.Info
- Publication number
- DE68922795D1 DE68922795D1 DE68922795T DE68922795T DE68922795D1 DE 68922795 D1 DE68922795 D1 DE 68922795D1 DE 68922795 T DE68922795 T DE 68922795T DE 68922795 T DE68922795 T DE 68922795T DE 68922795 D1 DE68922795 D1 DE 68922795D1
- Authority
- DE
- Germany
- Prior art keywords
- measuring
- integrated circuits
- contact resistance
- specific contact
- specific
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/14—Measuring resistance by measuring current or voltage obtained from a reference source
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/27—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements
- G01R31/275—Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements for testing individual semiconductor components within integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/224,512 US4896108A (en) | 1988-07-25 | 1988-07-25 | Test circuit for measuring specific contact resistivity of self-aligned contacts in integrated circuits |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68922795D1 true DE68922795D1 (de) | 1995-06-29 |
DE68922795T2 DE68922795T2 (de) | 1995-11-23 |
Family
ID=22841024
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68922795T Expired - Fee Related DE68922795T2 (de) | 1988-07-25 | 1989-07-13 | Verfahren zum Messen des spezifischen Kontaktwiderstandes in integrierten Schaltungen. |
Country Status (6)
Country | Link |
---|---|
US (1) | US4896108A (de) |
EP (1) | EP0352940B1 (de) |
JP (1) | JPH0658930B2 (de) |
CA (1) | CA1288526C (de) |
DE (1) | DE68922795T2 (de) |
HK (1) | HK103696A (de) |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5059897A (en) * | 1989-12-07 | 1991-10-22 | Texas Instruments Incorporated | Method and apparatus for testing passive substrates for integrated circuit mounting |
US5101152A (en) * | 1990-01-31 | 1992-03-31 | Hewlett-Packard Company | Integrated circuit transfer test device system utilizing lateral transistors |
JPH0541437A (ja) * | 1990-11-28 | 1993-02-19 | Seiko Epson Corp | 半導体装置 |
US5557209A (en) * | 1990-12-20 | 1996-09-17 | Hewlett-Packard Company | Identification of pin-open faults by capacitive coupling through the integrated circuit package |
US5625292A (en) * | 1990-12-20 | 1997-04-29 | Hewlett-Packard Company | System for measuring the integrity of an electrical contact |
US5519336A (en) * | 1992-03-03 | 1996-05-21 | Honeywell Inc. | Method for electrically characterizing the insulator in SOI devices |
US5286656A (en) * | 1992-11-02 | 1994-02-15 | National Semiconductor Corporation | Individualized prepackage AC performance testing of IC dies on a wafer using DC parametric test patterns |
US5420500A (en) * | 1992-11-25 | 1995-05-30 | Hewlett-Packard Company | Pacitive electrode system for detecting open solder joints in printed circuit assemblies |
JP2551340B2 (ja) * | 1993-06-30 | 1996-11-06 | 日本電気株式会社 | コンタクト抵抗測定用半導体集積回路装置およびその測定方法 |
US5504423A (en) * | 1994-11-01 | 1996-04-02 | The Research Foundation Of State University Of New York | Method for modeling interactions in multilayered electronic packaging structures |
US5548224A (en) * | 1995-01-20 | 1996-08-20 | Vlsi Technology, Inc | Method and apparatus for wafer level prediction of thin oxide reliability |
JP3727103B2 (ja) * | 1996-04-05 | 2005-12-14 | 三菱電機株式会社 | 半導体素子の試験方法 |
US5786700A (en) * | 1996-05-20 | 1998-07-28 | International Business Machines Corporation | Method for determining interconnection resistance of wire leads in electronic packages |
JP2000505948A (ja) * | 1996-11-08 | 2000-05-16 | ダブリュ.エル.ゴア アンド アソシエイツ,インコーポレイティド | 公称位置合せを向上させるための基準手法を用いる方法 |
US6181144B1 (en) * | 1998-02-25 | 2001-01-30 | Micron Technology, Inc. | Semiconductor probe card having resistance measuring circuitry and method fabrication |
US6172513B1 (en) * | 1998-03-02 | 2001-01-09 | Nec Corporation | Method for analyzing electrical contact between two conductive members of semiconductor device without destruction thereof |
US6297653B1 (en) | 1999-06-28 | 2001-10-02 | Micron Technology, Inc. | Interconnect and carrier with resistivity measuring contacts for testing semiconductor components |
GB0030346D0 (en) * | 2000-12-13 | 2001-01-24 | Mitel Semiconductor Ltd | Integrated circuit test structure |
KR100399976B1 (ko) * | 2001-11-23 | 2003-09-29 | 주식회사 하이닉스반도체 | 콘택 저항 측정용 테스트 패턴 및 그 제조 방법 |
JP3559971B2 (ja) * | 2001-12-11 | 2004-09-02 | 日産自動車株式会社 | 炭化珪素半導体装置およびその製造方法 |
JP3652671B2 (ja) * | 2002-05-24 | 2005-05-25 | 沖電気工業株式会社 | 測定用配線パターン及びその測定方法 |
US7391620B2 (en) * | 2003-04-18 | 2008-06-24 | International Business Machines Corporation | System for improving power distribution current measurement on printed circuit boards |
US6977512B2 (en) * | 2003-12-04 | 2005-12-20 | Lsi Logic Corporation | Method and apparatus for characterizing shared contacts in high-density SRAM cell design |
US7332924B2 (en) * | 2005-11-15 | 2008-02-19 | Agere Systems, Inc. | Embedded test circuitry and a method for testing a semiconductor device for breakdown, wearout or failure |
US7655972B2 (en) * | 2005-11-21 | 2010-02-02 | International Business Machines Corporation | Structure and method for MOSFET with reduced extension resistance |
JP2008078628A (ja) * | 2006-08-25 | 2008-04-03 | Canon Inc | 電子モジュールおよびその製造方法 |
JP2009272564A (ja) * | 2008-05-09 | 2009-11-19 | Toshiba Corp | 半導体装置及び半導体装置の製造方法 |
CN102593101B (zh) * | 2011-01-07 | 2014-04-16 | 上海华虹宏力半导体制造有限公司 | P型埋层引出孔电阻值的监测结构 |
US9252202B2 (en) * | 2011-08-23 | 2016-02-02 | Wafertech, Llc | Test structure and method for determining overlay accuracy in semiconductor devices using resistance measurement |
CN103837744B (zh) * | 2012-11-27 | 2016-05-25 | 中芯国际集成电路制造(上海)有限公司 | Mos晶体管的外部寄生电阻的测量方法 |
US9678520B2 (en) | 2013-03-15 | 2017-06-13 | Dominion Resources, Inc. | Electric power system control with planning of energy demand and energy efficiency using AMI-based data analysis |
JP6419493B2 (ja) * | 2013-09-05 | 2018-11-07 | 株式会社半導体エネルギー研究所 | コンタクト抵抗測定パターン及び半導体装置 |
US10354930B2 (en) | 2016-04-21 | 2019-07-16 | International Business Machines Corporation | S/D contact resistance measurement on FinFETs |
US9768085B1 (en) | 2016-07-25 | 2017-09-19 | International Business Machines Corporation | Top contact resistance measurement in vertical FETs |
US10670641B2 (en) * | 2017-08-22 | 2020-06-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor test device and manufacturing method thereof |
US10622257B2 (en) | 2017-12-15 | 2020-04-14 | International Business Machines Corporation | VFET device design for top contact resistance measurement |
CN109461668B (zh) * | 2018-09-07 | 2022-07-08 | 上海大学 | 金电极与碲锌镉晶片接触电阻率的测试方法 |
US11393731B2 (en) * | 2020-09-01 | 2022-07-19 | Nanya Technology Corporation | Semiconductor structure |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4542340A (en) * | 1982-12-30 | 1985-09-17 | Ibm Corporation | Testing method and structure for leakage current characterization in the manufacture of dynamic RAM cells |
US4517225A (en) * | 1983-05-02 | 1985-05-14 | Signetics Corporation | Method for manufacturing an electrical interconnection by selective tungsten deposition |
US4628144A (en) * | 1983-06-07 | 1986-12-09 | California Institute Of Technology | Method for contact resistivity measurements on photovoltaic cells and cell adapted for such measurement |
JPS6159743A (ja) * | 1984-08-30 | 1986-03-27 | Fujitsu Ltd | 半導体装置 |
US4706015A (en) * | 1986-01-09 | 1987-11-10 | Chen James T C | Method and circuit for reducing contact resistance of the potential probes of a four-point-probe in contact with a III-V compound semiconductor wafer |
US4789825A (en) * | 1986-05-14 | 1988-12-06 | American Telephone And Telegraph Co., At&T Bell Laboratories | Integrated circuit with channel length indicator |
-
1988
- 1988-07-25 US US07/224,512 patent/US4896108A/en not_active Expired - Lifetime
-
1989
- 1989-05-17 CA CA000599887A patent/CA1288526C/en not_active Expired - Fee Related
- 1989-07-13 DE DE68922795T patent/DE68922795T2/de not_active Expired - Fee Related
- 1989-07-13 EP EP89307107A patent/EP0352940B1/de not_active Expired - Lifetime
- 1989-07-18 JP JP1183853A patent/JPH0658930B2/ja not_active Expired - Fee Related
-
1996
- 1996-06-13 HK HK103696A patent/HK103696A/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE68922795T2 (de) | 1995-11-23 |
EP0352940B1 (de) | 1995-05-24 |
CA1288526C (en) | 1991-09-03 |
EP0352940A3 (de) | 1991-01-09 |
HK103696A (en) | 1996-06-21 |
EP0352940A2 (de) | 1990-01-31 |
JPH0268946A (ja) | 1990-03-08 |
US4896108A (en) | 1990-01-23 |
JPH0658930B2 (ja) | 1994-08-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |