DE68918818D1 - Verfahren zur Herstellung von Halbleiterbauelementen durch selektives, U.V.-unterstütztes Aetzen von Mehrschichten. - Google Patents

Verfahren zur Herstellung von Halbleiterbauelementen durch selektives, U.V.-unterstütztes Aetzen von Mehrschichten.

Info

Publication number
DE68918818D1
DE68918818D1 DE68918818T DE68918818T DE68918818D1 DE 68918818 D1 DE68918818 D1 DE 68918818D1 DE 68918818 T DE68918818 T DE 68918818T DE 68918818 T DE68918818 T DE 68918818T DE 68918818 D1 DE68918818 D1 DE 68918818D1
Authority
DE
Germany
Prior art keywords
multilayers
selective
production
semiconductor components
supported etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68918818T
Other languages
English (en)
Other versions
DE68918818T2 (de
Inventor
Makoto Kosugi
Naoki Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE68918818D1 publication Critical patent/DE68918818D1/de
Application granted granted Critical
Publication of DE68918818T2 publication Critical patent/DE68918818T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/6631—Bipolar junction transistors [BJT] with an active layer made of a group 13/15 material
    • H01L29/66318—Heterojunction transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30612—Etching of AIIIBV compounds
    • H01L21/30621—Vapour phase etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Drying Of Semiconductors (AREA)
DE68918818T 1988-12-13 1989-12-12 Verfahren zur Herstellung von Halbleiterbauelementen durch selektives, U.V.-unterstütztes Aetzen von Mehrschichten. Expired - Fee Related DE68918818T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP31440988 1988-12-13
JP15288489 1989-06-14

Publications (2)

Publication Number Publication Date
DE68918818D1 true DE68918818D1 (de) 1994-11-17
DE68918818T2 DE68918818T2 (de) 1995-02-09

Family

ID=26481671

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68918818T Expired - Fee Related DE68918818T2 (de) 1988-12-13 1989-12-12 Verfahren zur Herstellung von Halbleiterbauelementen durch selektives, U.V.-unterstütztes Aetzen von Mehrschichten.

Country Status (3)

Country Link
EP (1) EP0374036B1 (de)
KR (1) KR940002735B1 (de)
DE (1) DE68918818T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0582490A (ja) * 1991-09-19 1993-04-02 Hitachi Ltd 選択エツチングの方法、装置
JPH06132298A (ja) * 1992-10-14 1994-05-13 Mitsubishi Electric Corp 半導体装置の製造方法
US5843277A (en) * 1995-12-22 1998-12-01 Applied Komatsu Technology, Inc. Dry-etch of indium and tin oxides with C2H5I gas
DE60041314D1 (de) 1999-11-10 2009-02-26 Boeing Co Herstellungsverfahren für Dünnschichtbauelemente
FR2804247B1 (fr) * 2000-01-21 2002-04-12 St Microelectronics Sa Procede de realisation d'un transistor bipolaire a emetteur et base extrinseque auto-alignes
JP2002118327A (ja) * 2000-10-06 2002-04-19 Furukawa Electric Co Ltd:The 化合物半導体装置の製造方法
CN103855078A (zh) * 2012-12-07 2014-06-11 上海华虹宏力半导体制造有限公司 金属互联工艺方法
US11217444B2 (en) * 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
CN114540785B (zh) * 2022-01-20 2022-12-02 陕西源杰半导体科技股份有限公司 波导对接结构生长方法、铝量子阱激光器及其制备方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2598256B1 (fr) * 1986-04-30 1988-07-08 Thomson Csf Procede de gravure seche selective de couches de materiaux semi-conducteurs iii-v, et transistor obtenu par ce procede.

Also Published As

Publication number Publication date
EP0374036A3 (de) 1991-03-13
DE68918818T2 (de) 1995-02-09
KR940002735B1 (ko) 1994-03-31
EP0374036A2 (de) 1990-06-20
EP0374036B1 (de) 1994-10-12
KR900010941A (ko) 1990-07-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee